SEM/TEM of the Month
Staff -- Semiconductor International, 3/1/2002
A team in the nano processes
research department at Infineon
Technologies (Munich, Germany) has demonstrated the feasibility of fabrication of damascene structures with beyond-roadmap (ITRS 2001 edition) dimensions. This SEM shows nano grooves in oxide-based intermetal dielectric (IMD) that were developed for damascene metalization studies. Feature sizes — including CD (F=20 nm), aspect ratio (7:1) and length (1 mm=50,000 F) — exceed end-of-roadmap requirements for local interconnects.
Previously, such narrow structures could only be fabricated with exploratory tools such as direct-write e-beam lithography. However, these structures were fabricated with i-line lithography equipment for pattern generation on a silicon-based hard mask. After pattern transfer, the hard mask opening was reduced with a spacer consisting of the same material as the hard mask. The spacer was generated in the opened hard mask to reduce the opening by more than an order of magnitude.
The SEM displays the structure after IMD etch and removal of the narrowed hard mask. The residue (beads) on both sides of the nano groove were deliberately not removed because they show the location of the hard mask directly after pattern transfer. Their separation represents the minimum mask opening (0.35 µm) achievable with i-line lithography alone.
The wafers were processed in Infineon's Munich cleanrooms Ha84 and NanoLab. The IMD etch was performed with high etch rate (>500 nm/min) in a standard MERIE (magnetic field enhanced reactive ion etch) tool. Aspect ratio dependent etch rates (ARDE) were not observed, since the aspect ratio responsible for ARDE is very low even for these narrow structures.
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