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New Process Etches Copper

Peter Singer, Editor-in-Chief -- Semiconductor International, 2/1/2002

How many Texas Aggies does it take to develop a copper etch process? Two! Researchers Yue Kuo and Sangheon Lee of the Thin Film Microelectronics Research Laboratory, Chemical Engineering Department, at Texas A&M University (College Station, Texas) have developed a new copper etching method based on a novel plasma/Cu reaction. The process can be done at room temperature using a conventional plasma etcher.

Although aluminum is typically patterned by etch, that's not the case with copper. That's because plasma/copper reaction products have very low volatilities, making them difficult to remove from the surface. Copper patterning is therefore done with a damascene approach, where holes and trench are cut into the dielectric and then filled with copper, followed by a CMP step. The problem here is that Cu CMP is challenging and, according to the International Technology Roadmap for Semiconductors (ITRS), will have difficulty in defining patterns below 100 nm.

Instead of trying to evaporate the reaction product during plasma processing, the new process converts the whole copper film into a nonvolatile, porous Cu chloride or bromide compound that remains on the substrate surface. This compound is subsequently removed by dissolving it in a dilute hydrochloric solution.

The researchers believe this process has a better chance of success than other plasma Cu etch processes that have been proposed. Most methods have focused on ways of removing the copper halides, which have to be heated to above 400°C to have a vapor pressure above 1 Torr. For example, additional energy sources, such as high substrate temperature, high-density plasma sources, ultraviolet, and infrared, have been attached to the etch chamber to achieve a high Cu etch rate. Kuo and Lee say these are not practical for large-area substrates because of poor etch uniformity, and the added complexity of the equipment.

 
1. In a new copper etch process, a copper chloride compound is created with a plasma treatment (thereby consuming the copper). The CuClx compound is then removed with a dilute HCl wet process. (Source: Texas A&M University)

So far, the researchers have investigated the influences of process parameters such as plasma exposure time, pressure, plasma power, gas, and substrate temperature on the copper compound formation. The substrate temperature directly influences the copper conversion rate. For example, at 600 W and 20 mTorr plasma conditions, when the substrate temperature was increased from 25 to 100°C, the CuClx growth rate increased from 600 to 1200 nm/min. The morphology of the CuClx film was also affected by the substrate temperature. However, the researchers have also demonstrated good results at much lower temperatures — at room temperature, in fact (25°C). Figure 1 shows a cross-sectional view of the Cl2 plasma-exposed copper (400 nm) sample at 25°C substrate temperature. The uniqueness of the chlorination process is that the corrosive chlorine reagent is generated in the plasma phase and the substrate is under constant ion bombardment. Interestingly, the copper layer swelled to seven times its original size after the chlorination process. This swelling is caused by two mechanisms: 1) volume expansion due to the inclusion of chlorine to the film, and 2) the porous structure of the film. Kuo and Lee liken it to a metal rusting process. Figure 2 shows the resulting, successfully etched copper film.

In addition to variations of morphology and reaction rate, they have also investigated the relationship between the structure of the reaction product and the process condition, and developed a simple model to explain the reactions. Now, through a National Science Foundation-supported project, their focus has turned to the preparation of nanometer copper lines, Kuo said.

 
2. This vertical copper profile was obtained after removing the compound shown in Figure 1. (Source: Texas A&M University)

For additional information on wafer processing, go to www.semiconductor.net/wafer

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