IEDM Defines the Leading Edge

From carbon nanotubes to fingerprint sensors, 10 nm CMOS transistors to biochips, the annual gathering of IEEE's International Electron Devices Meeting (IEDM) will demonstrate how researchers continue to define state-of-the-art technology — presenting technologies that could enter the fabrication phase 5-10 years in the future. The meeting will be held Dec. 3-5 in Washington (visit www.ieee.org/organizations/pubs/newsletters/eds/oct01/IEDM.htm for more information).

This year's highlights include a presentation by researchers of STMicroelectronics (Crolles, France) of a conventional bulk CMOS transistor with the smallest gate length ever reported (16 nm NMOS). For rf applications, Philips' researchers in Eindhoven, Netherlands, will report on a 150 GHz device that uses 0.18 µm CMOS technology, demonstrating ways that silicon can continue to compete with GaAs and SiGe bipolar devices in the ultrahigh-frequency range.

When it comes to MOSFET device scaling, low-power, portable electronics are demanding ultralow parasitic gate leakage currents, which compromise device reliability and drain batteries. A research group from Texas Instruments (Dallas) will report on a 12.8 nm oxide equivalent gate dielectric based on hafnium silicate (78% Si). The group provides IV and CV characteristics, stability and reliability results, noting that leakage current through the material can be reduced by two orders of magnitude vs. the equivalent SiO₂ film, while maintaining good interface stability and TDDB (time-dependent dielectric breakdown) stability.

For everyday computer applications, a group from Compaq (Shrewsbury, Mass.) and Vanderbilt University (Nashville, Tenn.) will examine the importance of cosmic ray radiation, known as alpha particles, in the operation of high-performance microprocessors with large memory content. Alpha particles, for instance, have been implicated in the outage of a major Internet Web site. The study, which used a 21164 Alpha processor fabricated using 0.35 µm technology and operating at up to 400 MHz, suggests that the soft error rate (SER) of the core logic has a subtle frequency dependence. The researchers found that the SER decreases with increasing clock frequency and is dominated by contributions from dynamic latch nodes.

	At IEDM, researchers from NTT (Kanagawa, Japan) will report on the fabrication of a MEMS fingerprint sensor that can operate under conditions where moisture from skin or other sources may prevent identification. A finger ridge presses down the protrusions in each pixel. (Source: NTT)

In the manufacturing technology session, researchers from TSMC (Tainan, Taiwan) will report on 300 mm process integration of 0.13 µm devices fabricated containing copper interconnects and low-k dielectrics. The group achieved excellent yield on a four-level metal, 4Mb SRAM device on the company's 300 mm pilot line. Transfer of the 0.13 µm process from 200 to 300 mm required a 1-2.5 scaling of process power and gas flows for CVD and dry etch processes. Within-wafer thin oxide non-uniformity was <±1.6% by introducing O₂ gas at the ramp-down stage. The process used 248 nm lithography with OPC (optical proximity correction) models from the 200 mm process, obtaining comparable within-wafer CD uniformity. Good poly CD uniformity was a result of proper etch process tuning and line-end shortening control. TSMC observed no edge delamination of the low-k material after copper CMP.

This year, the IEDM committee also added a new session on emerging technologies, which will spotlight optical "free space" interconnects, rf wireless interconnects and a new 3-D wiring structure. There will be an evening panel discussion on "Interconnecting Devices for the Terabit Era: Myths, Rumors and Heresies," designed to address interconnecting challenges in high-speed communications.