350 GHz Transistor is World's Fastest

NTT researchers have developed what is now the world's fastest transistor, operating at 350 GHz. With a 3 ps gate delay, the transistors could be used to create digital circuits for telecommunications networks that could operate in excess of 100 Gb/sec. That's 10 times faster than today's standard. Full details will be provided at the upcoming International Electron Devices Meeting (IEDM), to be held Dec. 6-9 in San Francisco, Calif.

NTT achieved the new speed record with an indium phosphide (InP) high electron mobility transistor (HEMT), shown in Figure 1. The InP HEMT was lattice-matched to a InP substrate. The 350 GHz cutoff frequency is the highest value achieved by any kind of three-terminal device, according to NTT. If short channel effects are suppressed by reducing the barrier and/or channel thickness, it could be possible to achieve a 400 GHz cutoff frequency.

The transistor was fabricated with a 30 nm gate (Fig. 2), the smallest gate yet achieved for InP-based HEMTs, using a fullerene-incorporated nanocomposite electron beam resist.

Fig. 1. Operating at 350 GHz, this indium phosphide (InP)-based HEMT transistor is the fastest three-terminal device ever demonstrated. Details will be presented by NTT researchers at IEDM in December.

Fig. 2. NTT's InP HEMT has a 30 nm-long gate, the smallest achieved for that type of device. The InP transistor is lattice-matched to an InP substrate.

In a pre-print of a paper provided by conference organizers, the NTT researchers described how the electron beam resist they developed was the most critical part of the achievement. With EB resists, thinner is better for high resolution, but thin resists, in general, can cause profile control problems during subsequent etch steps, leading to higher resistivity. Resolution is further limited by the need to use T-shaped gates in order to reduce gate resistance.

At NTT, the researchers patterned the bottom of the T-shaped gate by electron beam (EB) lithography and then photolithography. This process makes it possible to use a single-layer EB resist. For the EB resist, ZEP-250 was used for the base resist and mixed with 10-wt% fullerene molecules (C₆₀ and C₇₀). This 'nanocomposite'' resist provides enhanced dry etching resistance without degradation of resolution, the researchers said. The gate patterns are replicated on a SiO₂/SiN layer by reactive ion etching.

The epitaxial layer was grown by MOCVD on InP substrates. The structure consists of, from bottom to top, InAlAs buffer (200 nm), InGaAs channel (15 nm), InAlAs spacer (3 nm), Si planar doping, InAlAs barrier (10 nm), InP etch-stopper (6 nm) and n⁺-doped InAlAs/InGaAs cap layers.