Bringing SOI Wafer Technology to the Mainstream

Ruth DeJule, Associate Editor -- Semiconductor International, 11/1/1998

The high-performance, low-power characteristics of silicon on insulator (SOI) wafers are showing promise as a means to enhancing current chip technologies. Until recently, SOI was relegated to niche markets such as radiation-hardened circuits for military and space environments. Today, SOI has found its way into the Semiconductor Industry Association (SIA) technology roadmap, and many chip makers are implementing SOI into digital device fabrication. IBM recently demonstrated the first commercially-viable application of thin SOI for its next-generation microprocessors. Performance increases of 35% due to SOI's reduced capacitance are anticipated.

There long has been competition between two technical approaches to producing SOI wafers: oxygen implantation and wafer bonding. One of the best known implant methods is separation by implantation of oxygen (SIMOX). Here a special implant tool is required to maintain a wafer temperature of >400°C in order to prevent destruction of the crystal by oxygen ions and to supply an oxygen dose 100X higher than ion implanters typically used in the semiconductor industry. This equipment is capable of producing ~20 8 in. wafers a day. Since SOI layer thickness is directly proportional to dose, dose uniformity has to be controlled to better than 1% to obtain industry requirements. Currently, SIMOX is limited to thin-film applications, said Andre Auberton-Herve, corporate president and chairman of the board, SOITEC (Bernin, France).

By 2001, the supply of 200 mm SOI wafers is estimated to be at two million. (Source: AMD and SEMATECH)

Alternatively, in wafer bonding, one wafer with a thermally grown oxygen layer is bonded to another. The SOI structure is formed when the backside of one of the wafers is lapped, leaving a thin layer of silicon adjacent to the oxide. Additional processing can be performed to improve uniformity and reduce thickness of the SOI layer. Traditional wafer bonding is an inexpensive technique for manufacturing thick, high-quality oxide and silicon films.

A relatively new technique invented at LETI and co-developed with SOITEC produces a thin-film SOI structure without the production issues inherent in SIMOX, according to Auberton-Herve. Based on proprietary technology, this bonding technique, called Smart Cut, uses hydrogen implantation to form a weakened region close to the surface of a silicon wafer. The wafer then is bonded to a second wafer, which has a thermally grown oxide layer. A low-temperature thermal treatment then is used to separate the bonded structure along the implanted perforation. The result is the transfer of a thin slice of silicon onto the oxide-coated support wafer.

This bonding approach can potentially reduce production, because it effectively uses only one wafer instead of two. The hydrogen implanted wafer can be reused after removal of the very thin SOI layer from its top surface. Wafer recycling is simple, consisting of a final polishing step equivalent to the last polishing step of a prime wafer. The relaxed requirements of low implant temperatures (below 600°C) and a hydrogen dose 100X lower than that required for standard SIMOX mean that standard manufacturing equipment can be used, adding further to a reduction in production costs. An economic advantage may arise from the fact that the SOI layer is from a different wafer than the support substrate. The crystalline quality of the support wafers therefore can be degraded with, theoretically, no impact on SOI wafer performance.

A mini-survey of all SOI material suppliers conducted by SEMATECH indicates that by 2001, a price per wafer 3X that of prime wafers is expected. The supply of wafers will approach two million (see Figure), said Advance Micro Devices' W. Maszara. Will this meet projected demands? Many, like those at SOITEC, think yes. They anticipate 100,000 SOI wafers/line. New approaches also have been developed to meet the anticipated demand. For example, a recently announced process from Silicon Genesis (Campbell, Calif.) integrates plasma immersion ion implantation and room temperature controlled cleaving into its layer-transfer process. Key are clusterability and high yields.