An Update: Transition to 300 CMP

Timothy Marbeiter, International SEMATECH, International 300 mm Initiative, Austin, Texas
Timothy Cleary and Karen Sutter, IPEC Planar, Portland, Oregon -- Semiconductor International, 11/1/1998

Scaling up is key to providing a low risk transition for all wafer size increases.

More than a dozen CMP equipment suppliers worldwide are known to be developing 300 mm tools. In Asia, Europe and the United States, each is at a different level of equipment maturity. There are a few known tools that have completed alpha-level testing, while others are beginning beta-level testing.

Open architecture

In the last three years, CMP has matured as a process. During this time, the industry has requested more integrated 200 mm CMP tools that combine post-CMP cleaners and metrology (in-line and endpoint) into the polisher and the development for open architecture systems. It is anticipated that 300 mm equipment will require a refinement of the open architecture scheme capable of supporting multiple configurations and system layouts.

Since most equipment used in these integrated systems is being developed in parallel, the challenge is to ensure that the final architecture is smoothly integrated. This has resulted in a disproporationate amount of time spent in the initial development stages of design and specification. This is where consortia like I300I and J300 have created guidelines that outline specific transitions and protocols to ensure better defined architectural interfaces.

A change in philosophy

Lead Photo: Based on the 200 mm design, a 300 mm wafer undergoes cleaning in an AvantGaard 876 integrated CMP process capsule. (Source: IPEC Planar)

The initial goal for most microchip manufacturers was to design and build new 300 mm facilities. The idea of retrofitting 300 mm equipment into existing facilities was considered prohibitively expensive and difficult. The downturn in the industry and the enormous capital costs associated with new factories, however, has resulted in a trend among some of the early leaders to evaluate the 300 mm transition as a pilot line within their existing factories. For CMP suppliers, this has meant a reexamination of the system layout to try and accommodate larger tools in smaller factories. Fortunately, 300 mm equipment has required no radical changes, only a scaling of 200 mm systems.

Scaling up to 300 mm

In the transition to 300 mm, one approach was to transfer the polish technology with minimal changes to benefit from the 200 mm experiences and the large accumulated data set. For example in IPEC Planar's 300 mm orbital polish platform, the layout was nearly identical to the 200 mm system, but scaled up to support the large wafer diameter. Results have proven to be very promising. In a process baseline taken from an IPEC 776 200 mm polisher and an equivalent process run on the IPEC 876 300 mm system, the results match closely, indicating that process transfer can be accomplished between wafer sizes with minimal effort (Fig. 1).

Fig. 1. A comparison of 200 mm to 300 mm oxide removal rates and non-uniformities indicates similar results. (Source: I300I)

This is especially good news for the end users, who can continue to perform development work for smaller geometries and newer polish materials such as copper on the much less expensive 200 mm platform and then transfer the results with confidence to 300 mm. This strategy was successfully used in the 150 to 200 mm transition and is now seen as key to low risk transition for all wafer size increases.

The downside to this approach is the additional requirement to reduce facilities and consumables. In the case of the polish data mentioned above, slurry use increased from 560 ml per wafer to 650 ml for the 300 mm wafer. This increase of 20% in chemical consumption, while outside the I300I recommendations of zero increase in consumables usage, has a positive net effect on cost-of-ownership because of the 230% increase in polish area.

The challenges

Before moving beyond beta level tools, four major hurdles must be overcome. Primary is the cost of the silicon. A 300 mm lithography grade (TW304) wafer can cost ~9X that of a comparable 200 mm wafer. Considering that the silicon required to complete a beta-level test can easily exceed 750 wafers, the quantities and availability of high quality particle grade silicon has been an issue until early this year. The cost, however, is still an issue.

The 300 mm PECVD and CMP tools are being developed in parallel. Unfortunately, this has resulted in CMP testing delays because of the inconsistency and unavailability of PETEOS deposited wafers. Furthermore, the unavailability of tungsten deposited wafers has also caused major schedule setbacks. The reason is that the deposition technology for the TiN adhesion layer is shifting from PVD to CVD. As with any change, suppliers are on a learning curve, addressing adhesion problems. Finally, metrology tools are in the early stages of development.

Tool specifications

Fig. 2. Topographical mapping of a 300mm wafer using AcuMap 3000 gives an indication of overall wafer flatness. (Source: IPEC Planar)

Other challenges come from the CMP tool. Currently, most high end users of CMP are running processes with a 3 mm edge exclusion and with the advent of 300 mm are expecting to at least maintain or improve on this requirement. Larger diameter wafers mean a flatter aspect angle with denser IC packing. Edge effects will become more critical as a larger portion of the chips are exposed.

Wafer edge non-uniformity is traditionally impacted in CMP by carrier design and slurry distribution. Tool architectures need to allow for an equal amount of slurry across the wafer surface and a constant polish down force transmitted to the very edge of the wafer. Figure 2 shows a topographical mapping of a 300 mm wafer using an IPEC AcuMap 3000.

One important challenge encountered by most CMP suppliers is the integration of the dry-in/dry-out requirement. While most supplier experts understand and have solved most polishing technology challenges, there are those who have never had to integrate a wafer cleaner system with their polishers. At 300 mm, these new users of integrated systems have to address the associated challenges necessary to keep defect levels to a world-class level. This alone has caused some suppliers to push out entry time to market to allow further development of their tools in this area (Table 1).

Standards

There has been considerable progress in the realm of equipment standards set forth by I300I. The majority of equipment suppliers have developed auto pad conditioning as the standard, while in-line metrology and end-point detection are in the early phases of development.

Procedures such as those defined by I300I Factory Guidelines have provided the necessary framework for new equipment suppliers to determine market expectations. The Demonstration Test Method was developed to gauge the progress for each of the 300 mm tools in terms of performance and to measure their maturity compared to the standards. The result has been a reduction in development costs and development time because of fewer iterations of design. Unlike 200 mm development, where several different chip manufacturers with similar expectations and requirements orchestrated their own qualification tests, clear standards have allowed concurrent development of 300 mm assemblies by suppliers.

Within the next several months, a few beta-level tools will be tested. Process performance and equipment characterization will be benchmarked at that time, and new challenges will be identified.