Assembly Productivity Still Has Room for Improvement

Asif R. Chowdhury and Lee J. Smith
Amkor Technology Inc., Chandler, Ariz., -- Semiconductor International, 7/1/1999

Productivity in the integrated circuit (IC) assembly process has come a long way over the years. In fact, some who have been a part of it for many years think it is as efficient as it can be. Though it has progressed a great deal, there is obviously more room for assembly productivity to improve. As the market continues to drive prices down, assembly foundries are scrambling to reduce assembly cost.

From a manufacturing standpoint, productivity improvement is most often interpreted as: improved yield, faster cycle time, lower cost, maximized machine utilization and maximized floor space utilization. From a practical standpoint, even incremental productivity improvements involve some level of investment. With the 30% annual price reductions in certain high-volume devices (DRAM for example) over the last three years, many package types require aggressive cost reduction. At the same time, many of these devices are segmenting into different performance applications that require diverse packaging technologies. It takes significant levels of investment to deliver both the major cost reduction and performance improvements needed to serve a customer's mature and emerging semiconductor requirements (Fig. 1).

Fig. 1 Meeting the industry's need for productivity requires a large investment in facilities and equipment.

To achieve this dual set of requirements, closer cooperation is required between the semiconductor company and the packaging foundry. If the new capability or capacity is not fully utilized, then achieving the necessary return on investment will require price increases. No price reduction is possible, however, without the increased productivity. This article focuses on how to achieve productivity improvements by making the assembly process more efficient.

Strip design

To achieve optimum cost and performance, productivity improvements must start with design and design for manufacturability. To design for productivity, one must maximize the number of units on a strip in a way that reduces material and processing costs. This is not a new concept, and most assembly houses are currently doing this.

In the early days of assembly on leadframes, a strip could have up to 10 units, all in one row. For relatively large packages, such as plastic dual in-line packages (PDIP), the next step was to go to an interdigitated strip, where the pins were interlaced to allow more units per strip. Three or four more units could be squeezed into the same strip length. As packages got smaller, the next logical step was to go to matrix frames.

Amkor Technology has taken this approach in building new manufacturing modules. For 7 mm x 7 mm thin quad flat pack (TQFP) packages, the Phase I migration in 1994 went to an 8 x 2 matrix. The migration is now in Phase III, and as shown in Table 1, each phase has had a significant improvement in capacity along with the investment.

The strip width and length had to be increased at each step, and the equipment handlers had to be modified to handle the wider strips. In the case of these packages, savings in leadframe cost are very small, since leadframe cost is low compared to other cost factors. However, the increased throughput will lead to larger savings in batch processes such as molding, or in curing die attach and mold compounds.

For laminate packages such as ball grid arrays (BGAs), the substrate cost is a significant portion of the overall package cost. Maximizing panel utilization can have a big impact on reducing the unit substrate cost. On top of this, there is the increased throughput efficiency as mentioned above. Almost everyone is running plastic BGAs (PBGAs) in a single format, because a matrix PBGA is difficult to process. Their drive is to go to a matrix solution for PBGA.

The ChipArray BGA (CABGA) is one example of a matrix solution for fine pitch BGAs (FPBGAs). It is die attached and wire bonded, like a matrix leadframe, though the back-end part of the assembly is different from a standard BGA. The whole matrix is encapsulated or overmolded and then sawn into individual packages at the end. Substrate utilization for the CABGA with the matrix design is more than 60%, while the conventional strip uses only 30% to 35%.

Front-of-line assembly

After the strips have been optimized, there are a number of steps in the assembly process itself that can be optimized or even eliminated. The first steps are backgrinding the wafer, if necessary, then wafer saw. Backgrinding is dictated by the package thickness most of the time, so not much can be done there. Newer packages are getting smaller and thinner, and in some cases, electrical performance may also require a thinner die.

In the case of wafer saw, more efficient equipment is being developed with multiple blades. For example, sawing a wafer that requires 20 horizontal cuts and 20 vertical cuts can take ~400 seconds, depending on equipment, using a single-blade system. By going to a five blade system, that saw time reduces to 80 seconds, assuming that everything else is equal. The number of blades can vary depending on the die pattern on the wafer. This is more applicable for high-volume manufacturing of a particular wafer type. The advantage quickly diminishes if there is too much of a product mix in assembly, because changeover and alignment of the blades takes a comparatively long time. This kind of saw machine does exist today. At Amkor, they are used mostly for singulating CABGA packages.

Next in the process is die attach, followed by wire bonding. The dies are bonded onto substrates, leadframes, or in the case of laminate BGAs, PC board material. For die attach, productivity improvement comes from the material side. Cure can take anywhere from 90 seconds to four hours depending on material, package and sometimes die size. Suppliers are developing fast-cure materials that can be cured in only 15 minutes. The concern with these materials is whether any reliability or moisture resistance is sacrificed.

Fig. 2 Simplified process flows reduce cycle time and costs.

Suppliers are now being pushed to go to snap cure materials, for which the cure time can be 60 to 90 seconds. With cure times this short, snap cure ovens can be attached to the die-attach machine to increase throughput. Snap cure ovens, however, can be expensive, so the benefits have to be weighed against capital investment.

Another option is curing at the heater block of the wire bonder. A preheat station can be added on the wire bonder and the die attach material cured there for 60 seconds. After that, the unit is ready for wirebonding. These fast cure materials cost the same as standard cure materials, so there is really no cost to do fast cure. There are two direct benefits by going this route. First, it will significantly reduce cycle time: Going from a four-hour die attach cure to a 15-min cure can reduce the cycle time by two days in many cases. Second, it will free up floor space taken by the cure ovens: More capacity can be added in the same space.

In the wire bonding process, productivity increases will have to come from the equipment suppliers. Most of the new wire bonders are quite fast compared to the previous versions in terms of throughput. In most cases, and certainly for high pin count packages, the wire bond process is the bottleneck. Depending on the number of wires per device, the number of wire bonders needed to match the throughput of a die attach machine can be anywhere from 2 to 10. These machines take up a lot of floor space and they are capital intensive.

It will take some time for wire bond vendors to develop the technologies necessary to close this gap. For example, dual transducer or dual head wire bonders can double the throughput of a wire bonder. This concept has been tried in the past, but it did not take off because of the sheer complexity inherent to this type of machine. It may be worth reexamining the feasibility of this kind of system, with the advent of newer computing technology. It may also be worthwhile to do a cost analysis in terms of new equipment cost versus productivity increase and floor space savings.

Back-of-line assembly

The back-of-line process starts with mold or encapsulation, then post mold cure (PMC) for 2 to 6 hours. Molding equipment has already seen significant improvements by going to automold systems that require little manual labor and have higher throughput compared to conventional mold equipment. Coupled with the matrix strip design, there is a big impact on productivity.

Productivity can be further improved with improved mold materials. For transfer molding, there is in-mold cure and post-mold-cure. Most mold materials in use today are rapid cure. The in-mold cure time for rapid cure materials is ~60 seconds, compared to 120 seconds for transfer molding materials. A larger impact is realized by going to reduced or no PMC materials. Quite a few suppliers now offer them.

There has been a prohibitive concern in the past about reduced package reliability when PMC was not applied. Some customers still will not allow assembly houses to eliminate PMC, even though the materials have been proven in the field. They will allow a reduced PMC though, which is typically 2 hours long compared to 6 hours. This still provides a significant cycle reduction.

The '3P' process, offered by ESEC, is much cleaner than conventional transfer molding and eliminates the need for mold equipment to be in a different cleanroom from the front-of-line equipment. This allows a more streamlined process flow and less handling of material. For lead frame products, it also eliminates the need for dambars, removing a whole process step.

Fig. 3 Testing devices on the strip before a singulation speeds cycle time.

After molding, leadframes go though dambar removal and Pb/Sn or Ni/Pd plating, followed by marking and singulation. In the case of PBGAs, the units go through mark and ball attach, then are singulated from the strip. Each of these steps can be made more efficient or even eliminated. Each time a step can be eliminated, there is a significant cycle time savings (Fig. 2).

The most significant productivity impact for the back-of-line processes comes from eliminating the plating or lead-finish process for leadframe packages. This can be done by getting the leadframes pre-plated from the supplier. The leadframe cost may go up, but at most this just shifts the cost from one place to another. However, in terms of cycle time and floor space utilization, there will be a huge impact. Plating machines take up a lot of floor space and require waste treatment, environmental control facilities and infrastructure support. This can be very significant for new assembly facilities that do not have an established waste treatment capability. This, of course, does not apply to BGA products since there is no plating process in BGA assembly.

Integrating test to the assembly process is the next step. Amkor is now performing parallel tests in strip format. Singulation is done right after testing (Fig. 3). This will increase the throughput of the test operation, increasing test capacity and reducing costs.

Automation

In addition to improving productivity at the individual process steps, there is more efficiency and productivity to be gained by integrating all the assembly processes through automation. In many ways, today's assembly process resembles the wafer manufacturing process from 20 years ago, with a lot of handling of parts, carrying them from one process station to the next. The industry is now moving toward automated handling in assembly. Some suppliers have fully automated front-of-line processes with robot track systems that take over after wafer saw. Many assembly houses are trying to integrate further, connecting the front-of-line process to the back-of-line process. The whole assembly process, then, is controlled from a remote station much like today's wafer fabs.

Fig. 4 Some packages are designed for streamlined production.

The cost and complexity associated with automating the assembly operations is significant. These are the barriers, since obviously the technology exists to go this route. As pressure mounts to further cut assembly cost, automation is the answer to take cost reduction to the next level. This will reduce cycle time from weeks to days. Also, less manual handling will reduce the possibility of damage and associated impacts on rework or assembly yields. At some point, the assembly house will have to make the capital investment. It is no longer a question of 'if' but 'when.'

Package design

Some newer packages, because of their design, can make the assembly process significantly more efficient, especially if they require no new equipment. One example is the MicroLeadframe package, a leadframe-based near-chip-scale package with no externally protruding leads (Fig. 4). It uses standard leadframe technology and has no external leads, so the trim and form process are eliminated. The die paddle is also exposed at the bottom to enhance thermal performance.

Chip scale packages (CSPs), when assembled at the wafer level, can be quite efficient in terms of productivity. Every step is done on the wafer and, at the very end, sawn into individual packaged units. Wafer level packaging is currently limited to applications with large die and small I/O densities, such as memory.

Taking the process one step further, even the test and burn-in can be done at a wafer level. This makes the test operation more efficient and cost effective. Currently, wafer level CSPs will not necessarily be the most cost effective solution due to the lack of standards, equipment, solder joint reliability and industry infrastructure. Some wafer level CSPs have been designed to use existing packaging technologies to get around these problems.

Many of the new fine pitch generation of packages, including many popular CSPs, use flex tape interposers instead of rigid organic printed circuit substrates. The most efficient way to produce these package types is by reel-to-reel assembly. Instead of getting the substrates cut up at a certain length, the interposer supplier will send it in a spool just like for TAB assembly. Manufacturing equipment will have to be modified to handle the reel-to-reel process. Testing can also be done in the reel-to-reel format, leaving singulation for the very end.

Flip-chip is the other niche, which essentially combines the die attach and interconnect into a single-step process. For most applications, wire bond is still more cost effective than flip-chip technology. The need for flip-chip will be driven by devices with higher I/Os (> 800), because silicon utilization increases significantly. Devices requiring higher electrical performance will also benefit significantly from the flip-chip solution.

Conclusion

The need to reduce assembly cost has become intense in the last few years, with markets demanding lower prices faster than ever. Productivity must continue to improve in the assembly house. Improved floor use is one critical factor. Pressure is also on to improve cycle time, as customers are screaming to get parts faster. These goals can be achieved by designing for productivity and making the process more efficient. The role of design will become more critical, not only to achieve the performance requirements necessary in advanced IC packages, but also in designing new packages and package formats that meet current and future cost objectives.