Siemens, Sente Ink Pact

-- Semiconductor International, 5/1/1999

Sente, an electronic design automation (EDA) specialist in Acton, Mass., and Siemens Semiconductors (Munich, Germany) have signed an agreement valued at more than $1 million to address power consumption problems of complex system-on-chip designs. The multi-year partnership introduces and tightly integrates the Sente power analysis software Watt Watch and Peak Watcher into Siemens Semiconductors' ASIC design methodology known as the Semi-Custom Highway. Combining these technologies allows designers to run a complete power analysis of their design, first at the register transfer level (RTL) and then at the gate-level pre- and post-layout from a single command. Library and design file management is automatic.

With the available number of gates on a die increasing faster than the power per gate falls, complex ASIC designers must now include power as part of design constraints. Once a design has been committed to RTL, 80 percent of the power consumption is fixed, noted Alan Page, managing director for Sente Europe. The only way to have a significant impact is to design the RTL with power in mind. The goal of the partnership is to address investigations in respect to power consumption as early as possible in the chip development. Watt Watcher is available within Semi-Custom Highway immediately. Peak Watcher will be available shortly.