Improving Yield Using Virtual DOE

Laura Peters, Senior Editor -- Semiconductor International, 12/1/1999

   Part 11 of Series

A virtual design of experiments (DOE) method uses existing process, electrical test and wafer probe data to assess the effects of electrical test parameter interactions on wafer probe yield. In this segment of our series on integrated yield management, Nick Atchison and Ron Ross of TI's Silicon Systems (Santa Cruz, Calif.) developed a software program to automatically determine such interactions without actually running corner lots with intentionally varied electrical parameters, saving time and expense. The method identifies design sensitivities and process/design mismatches early in the develop cycle while indicating ways to improve probe yield by adjusting the process.

Fig. 1 Analytical procedures apportion yield loss to design, test, process, equipment and random defect problems.

Each level of the IYM triangle (see Figure) is independent and produces a different yield analysis, allowing engineers to cross-check results. The virtual DOE analysis is analogous to the product sensitivity analysis (see SI, May 1999, p.48), though the virtual DOE method determines interactive effects between electrical parameters such as V_tn and wafer probe parameters such as I_cc standby current. DOE analysis is performed after PSA has determined the parameters indicating highest yield loss. When electrical parameters correlate strongly with each other and the probe parameter is sensitive to both electrical parameters, only one electrical parameter needs to be analyzed. Analyzing the effects of two electrical parameter interactions on one wafer probe parameter requires approximately 300 wafers with x-y electrical and parametric data from
5 sites/wafer.

First, the engineer organizes data by lot number, wafer number, site number, electrical parameters and probe parameter in a table. Then he/she groups the data into 9 'buckets,' each including the same number of data points. The user groups the data by high, medium and low value combinations (3x3) for the two electrical test parameters. Then the engineer averages the electrical test and wafer probe values in each group. Next the user extracts specification (spec) limits for the electrical test and probe parameters by plotting one electrical parameter on the x-axis, the probe parameter on the y-axis, and drawing three best-fit lines representing the low, medium and high values of the remaining electrical parameter. Drawn horizontal lines for the probe parameter determine its spec limits, and vertical lines determine the limits for the electrical parameter on the x-axis.

Parallel data lines indicate no interaction; i.e., the interaction between the primary electrical parameter and the probe parameter is the same for low, medium and high values of the secondary electrical parameter. If two lines cross there is an interactive effect. Finally the engineer draws ±3s lines for each curve. A straight line is plotted from the -3s point through the highest best fit line, and a line drawn through the +3s of lowest curve and parallel to the best-fit line is extended, until both intersect the low and high limits of the electrical parameter.

The product is not robust if the +3s line of the top curve passes through the upper spec limit line for the probe parameter while the electrical parameter is still in spec. The intersection with the electrical parameter spec line indicates where the probe parameter's spec limit should be set to ensure no yield loss for this sensitivity. Likewise, for the lower spec limits.

The user can analyze yield limits caused by sensitivities by superimposing actual frequency distributions of the electrical parameters on the x-axis and extending a vertical line from the intersection of the upper best-fit line with the upper spec line of the probe parameter down to the bottom of the frequency distribution, and similarly with a vertical line from the intersection of the lowest best-fit line to the frequency distribution bottom. The user simply calculates yield loss by dividing the ratio of the area of the histogram falling to the right of the first vertical line by the total area of the histogram. This calculation gives yield loss due to the probe parameter's sensitivity to the primary electrical parameter at the high level of the secondary electrical parameter. If none of the histogram lies outside the vertical line, yield loss is zero.