SI CHINA     SI JAPAN
Login  |  Register          Free Newsletter Subscription
Subscribe
Email
Print
Reprint
Learn RSS

Wafer Overcoat Simplifies Bumping

John Baliga, Associate Editor -- Semiconductor International, 2/1/1999

HD MicroSystems (Parlin, N.J.), a joint venture of Hitachi Chemical Company Ltd. and DuPont, recently introduced an i-line photodefinable polyimide material, HD-4000, for wafer overcoat and flip-chip applications. The two companies combined expertise to produce a polyimide overcoat material that can stand up to solder reflow temperatures, while having photosensitive properties stable enough for full flow manufacturing.

Overcoat materials protect the chip's surface for shipping, encapsulation and underfill operations. Encapsulants and underfills have filler materials that can damage the top film layers on the chip. In flip-chip applications, this overcoat can be used as the dielectric for redistribution, as well as a solder mask. In both flip-chip and peripheral lead applications, openings in the overcoat are required to expose contact pads. Typically, the overcoat goes on at the wafer level.

Cured polyimide materials provide thermal and mechanical stability. They also provide a reasonable amount of compliance, though not necessarily enough to act as an underfill. A photosensitive polyimide is imaged and developed directly, using typical lithography equipment. Image resolution is higher and processing simpler for the photosensitive material than for a non-photosensitive material, which requires photoresist and wet processing to pattern. After development, the polyimide acts as a single mask for subsequent operations.

SI02APNEWS
An i-line stepper imaged this 10 µm via directly onto the polyimide material.
The material is better suited for manufacturing than most photosensitive polyimides. Its freezer shelf life is about five weeks, and its maximum hold time is about 48 hrs. A 5 µm film of the material will allow patterning of features down to 4 µm (see figure). Its glass transition temperature is 350°C, allowing it to stand up to solder reflow temperatures.

Materials such as this provide more applications for i-line equipment, not just in fabs, but also in packaging facilities.

_|

  TAC Lines Include Packaging

Two kinds of chip packaging will be added to the Technology Advancement Center (TAC) manufacturing demonstration lines at NEPCON West '99. The TAC lines run in the exhibit hall in a section separate from the company exhibits and have historically demonstrated the state-of-the-art in board assembly. This year, one line will demonstrate a new Direct RAMBUS DRAM µBGA packaging process, and another will demonstrate a tape ball grid array (TBGA) strip assembly.

These packaging technologies are examples of how packaging and board assembly technologies are borrowing from each other and merging. Steve Sytsma of RRA Technical Services (Grand Rapids, Mich.), project director for the packaging lines, said, "Both the µBGA CSP and the TBGA assembly processes show an overlap between the semiconductor industry and the circuit board assembly industry. These industries are sharing machine and material technologies to find the best solution for a variety of processes."

Email
Print
Reprint
Learn RSS

Talkback

We would love your feedback!

Post a comment

» VIEW ALL TALKBACK THREADS

Related Content

Related Content

 

By This Author

SPONSORED LINKS



 
Advertisement
SPONSORED LINKS

More Content

  • Blogs
  • Podcasts
  • Videos

Blogs

Podcasts

Videos

Advertisements





NEWSLETTERS
Plug in and get the latest SI news, trends and industry updates delivered free, directly to your inbox!

SI NewsBreak and Special Reports (Weekdays)
Wafer Processing Report (Monthly)
Lithography Report (Monthly)
Metrology Report (Monthly)
Clean Processing Report (Monthly)
Packaging Report (Twice Monthly)
©2008 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.
Use of this Web site is subject to its Terms of Use | Privacy Policy
Please visit these other Reed Business sites