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Yield is Everything

Laura Peters, Senior Editor -- Semiconductor International, 12/1/1998

At a recent writing conference, I was explaining the fundamentals of semiconductors to a group of writers when one man asked me "Is yield still important? I know it always was in my day." I told this veteran of World War II who has worked in a variety of industries that yes, as it was 20 years ago, "yield is everything."

Though this statement is an obvious exaggeration, yield is everything in that, if you don't have product that yields, you don't have anything to sell. Over the last 20 years, the objective of high yields has not changed, but the methods for defect reduction, classification and sourcing have become increasingly sophisticated. Increased rates of yield learning are more critical than ever.

Twenty years ago, to manage yield was to track yield. Failure analysis played the central role of yield improvement. Inspection routines were largely perceived as a necessary evil and were selectively employed at the most critical process steps. However, statistical monitoring techniques were not always properly applied, and tracked data in some cases became wall decorations rather than playing an integral role manufacturing process improvement.

Systematic methods for continuous improvement of yield did not exist then as they do today. Defect mechanisms were largely the domain of process and product engineers who learned the device's sensitivity to process variances through the course of its production lifetime. Mask defects significantly limited yields. Problems such as process duplication or missed process steps were more common then. Product rework was widely practiced.

Today's challenges range from finding and repairing defects on phase-shift masks and identifying process drift with CD-SEMs to incorporating in-situ measurement data into the maze of other in-line inspection data, probe results, bit map data, etc. Filtering terabits of data into information that can be readily used for yield improvement becomes more difficult with every device generation. Fortunately, the advanced tools available from some companies are making seemingly impossible tasks possible.

Defect-free manufacturing depends on model-based, sensor-driven manufacturing to increase operational efficiency. Bi-directional data transfer among tools is now required to allow tool-level fault detection, classification and preventive maintenance. Once the variation tolerance of critical process parameters and the interaction between processes is understood, process-control strategies can be used to reduce reliance on monitor wafers. Defect targets for a given process can then be used to guide new process tool development, assessing tradeoffs between yield ramp objectives, factory cost and process complexity. The 1997 SIA Roadmap offers potential solutions for defect reduction (see table).

Defect Reduction
Key Issues Potential Solutions
Variation tolerance of critical process parameters
Process control enablers and extendability
Root cause analysis of performance detractors
Experimental mapping of the parameter space for each
process and correlation to device performance
Process interactions
Wafer state analysis
Initial equipment state consistency
Impact of contamination on OEE
Short loop modeling and experimental mapping of
parameter state variations

Component wear and lifetime studies
Process critical fluids and materials purity requirements
POU contamination monitoring
Materials reliability and consistency
Industry test structure for each node on roadmap
Process parameter studies
Reduce end of line inspection and monitor wafers
Nonvisual defect detection
Metrology for <0.08 µm defects
Inline inspection tools
In-situ sensors for advanced process control
Rapid yield ramp
Process specific yield models

Process control
Inline inspection metrology
Correlation of parameter space variation and defects
Factory performance metrics to prevent defects
Electromagnetic interference
Vibration
Molecular contamination

Short loop models
Data/metrics standards
 

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