SI CHINA     SI JAPAN
Login  |  Register          Free Newsletter Subscription
Subscribe
Email
Print
Reprint
Learn RSS

Twenty Years of Packaging Progress

John Baliga, Associate Editor -- Semiconductor International, 12/1/1998

In the 20 years that have passed since Semiconductor International was first published, assembly and packaging has come a long way. Like any other stage in the process flow, its implementation has grown in sophistication as the industry called upon it to do so. Some things that were packaging technologies of the future 30 years ago, like flip chip, still are not really technologies of the present just yet, because demand has not yet forced companies away from the established, less expensive technologies of die bonding and wirebonding.

Twenty years ago, there was no "need" to have megaflops of computing power on the desktop, so there was no need to have millions of transistors on chips, or for logic to have megahertz level clock speeds. In this climate, packaging technology did not need to be very sophisticated. It just had to be done quickly enough to meet demand, contain the chip and have the I/O connections to the board.

Packaging was labor driven, rather than technology driven, and it used to be more of a task than a process stage. It was enough to get the die securely glued into place and wires bonded from the die to the pins.

It was about 15-20 years ago that automated manufacturing methods really started finding their way into the packaging and assembly facility. Flexible manufacturing, in which chips are processed in batches and tracked by an automated work-in-process (WIP) management system, also just started to be used about 15 years ago.

Packaging has gone through many phases over the last 20 years, from TO cans to DIPs and a variety of peripherally leaded surface mount packages to area array packages. For most of the last 20 years, packaging technology improvements were ultimately measured by the pitch of perepherally leaded I/Os. Pad pitch increments followed the 80% rule; the next pitch would be 80% of the current one. The potential board space reduction of 64% provided enough benefit for each step, and the 80% reduction in pitch was practical enough to achieve in each step.

All of these "80% rule" steps were costly, and it is that memory that makes many shudder at the kind of changes that appear to be coming. A good number of those changes, though, will leverage the board assembly technologies that were developed at each "80% rule" step. It appears that the 80% rule is still being used for area array ball pitches, which may or may not be wise.1

Now, packaging is starting to mutate. There is more demand for higher performance in personal appliances, one of the fastest growing market segments. This means that a larger fraction of packaged devices will have to be done in more advanced packages. For these devices, the package will have to perform all of its functions while doing all it can to get out of the way. They will have to shrink as much as possible on one hand and integrate as many passive circuit elements as possible on the other.

The first phase in the mutation is chip scale packaging, in which the package is reduced in size as much as possible. The next phase may turn the "board" into more of a framework than a circuit. Rather than connecting memory chips together, that board might be connecting whole computers together, where each computer is a system-on-a-chip sitting in an integrated passive package.

There are other signs of mutation. One concept has the top interconnect layers being offloaded from the chip to the package. Another has bare chips snapping together like puzzle pieces. There is even work being done to enable three-dimensional packaging for commercial devices.

Right now, memory chips are being stacked together in packages. That may just be the first step. Three-dimensional packaging would be a natural extension of what has been happening on the chip in the past few years, with on-chip interconnection reaching five layers. Puzzle-piecing chips onto boards may give way to Lego block type construction.

The assembly and packaging segment of the semiconductor industry has come a long way in the last 20 years. It looks like it will be taking some giant leaps in the next five years.

  1. J. Fjelstad, "Make Standards Sensible," Semiconductor International, March 1998, p.92
    Email
    Print
    Reprint
    Learn RSS

    Talkback

    We would love your feedback!

    Post a comment

    » VIEW ALL TALKBACK THREADS

    Related Content

    Related Content

     

    By This Author

    SPONSORED LINKS



 
Advertisement
SPONSORED LINKS

More Content

  • Blogs
  • Podcasts
  • Videos

Blogs

Videos

Advertisements





NEWSLETTERS
Plug in and get the latest SI news, trends and industry updates delivered free, directly to your inbox!

SI NewsBreak and Special Reports (Weekdays)
Wafer Processing Report (Monthly)
Lithography Report (Monthly)
Metrology Report (Monthly)
Clean Processing Report (Monthly)
Packaging Report (Twice Monthly)
©2008 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.
Use of this Web site is subject to its Terms of Use | Privacy Policy
Please visit these other Reed Business sites