KGD Testing in Automotive Applications
Haim Taraseiskey, International Rectifier, El Segundo, Calif. Rémy Degen and Rod Darling, Ismeca, Carlsbad, Calif. -- Semiconductor International, 9/1/1998
Known Good Die (KGD) is a technology that already involves and brings together most key players in the semiconductor industry, device manufacturers, equipment providers and component end users. While the well-protected and "easy-to-assemble" SMT components will not disappear, KGD technology will bridge the gap to allow semiconductor maunfacturers to enter into new markets, such as multichip modules (MCMs), chip-on-board (COB) and chip scale packaging (CSP). All of these new terminologies and technologies are influenced directly by the concept of KGD.International Rectifier (IR), a supplier of power semiconductor systems solutions, wanted to manufacture a known-good power die that would be a breakthrough silicon chip delivery system to the user. To accomplish this, IR had to develop a process that combined high-precision testing of electrical parameters of individual die after the wafer was sawn, and then package these die in tape on reel for high-volume manufacturing assembly.
At the same time, Ismeca, a manufacturer of tape-and-reel equipment, decided to address the challenge of handling KGD. The idea was to work closely with a customer and their chosen tester supplier to develop the ideal handler for their needs. With the technical guidance of this alliance for optimizing the test environment and a beta site facility for initial evaluation of the prototype system, Ismeca could design and manufacture a total system solution for visual inspection, test and packaging for shipment of 100% KGD. The opportunity to form such an alliance arrived when IR approached Ismeca.
IR was required to provide its product to a major automotive manufacturer in the form of KGD immediately. The device had to be visually inspected to rigorous specifications, electrically tested for multiple test parameters and packaged using standard tape-and-reel methods.
The technical challenges were extreme. The risk level for introducing physical damage while handling the fragile bare die was very high. Pre-screening of the die at wafer level included not only ink dot inspection, but also physical defect inspection. Visual inspection and test contact had to be available for both sides of the die. Electrical contact had to be made without disturbing the die's surface integrity. Final output into both tape and tray was required.
The project started using a design concept based on a standard platform using standard modules. It quickly became apparent however, that new techniques had to be developed to overcome the unique problems encountered.
The first problem required the development of a "flipping" mechanism. This mechanism had to allow the die to be inverted top-to-bottom for inspecting either side of the die or for presenting the die for test in an inverted orientation. Ismeca's unique design provided a dual-sliding shutter that enclosed the die during flip, but provided complete visible access to the die when at rest. This design, with a patent pending, provided 1808 inversion with complete control of the die and no altering of the silicon surface.
The next development involved a cooperative effort between Ismeca, IR and the tester manufacturer, LTX (formerly iP Test) to develop a test nest and multiple test stations. Test stations were provided for up to five sequential tests. Working closely with LTX, Ismeca optimized the test environment for the new generation tester in order to provide optimum test capabilities for IR. A nest was designed that made contact with both the die's upper and lower surfaces. Upper contact was made by a small "mini-probe card" with standard wafer probes to make contact with the die. The lower contact was a true Kelvin contact base card. The probe card and base card were connected to the tester via "flying" contacts. Alignment of the individual nests was done off-site using a calibrated alignment fixture. The amount of closure force was set easily in order to provide precise control of the amount of overtravel for probe scrub and penetration into the oxide present on the die surface.
Quick disconnect capability for the test nests was an additional requirement from IR. The resulting design was a test socket that could be pre-aligned, presented a one-time probe contact with the die for up to five sequential tests, and changed in less than 15 sec.
Another challenge was to provide an output with the flexibility needed to put good die into tape, QA rejects into waffle trays for retesting and electrical and vision failed devices into bulk. Beyond that capability, Ismeca also provided an output capability to rebuild a wafer at the output. This capability allowed IR to provide its customers a full wafer with 100% KGD. The wafer could be constructed of different die in the form of matched die sets. Die sets could be matched for functional performance, speed, power, etc.
Unlike test fixtures of the past, this bare die testing does not damage the
die and has been implemented in a volume packaged tape and reel process (as
an option, the die can be packaged in chip trays).
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Haim Taraseiskey is the technical market manager for switch products at International Rectifier. He can be reached by phone at 310-252-7942, fax at 310-252-7176 or e-mail: htarase1@irf.com. |
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Rémy Degen is the corporate marketing manager for Ismeca S.A.'s semiconductor division. He can be reached be e-mail at rdegen@ismeca.ch. |
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Rod Darling is a project manager at Ismeca. He can be reach by phone at 760-931-1153, fax at 760-931-8713 or e-mail: rdarling@ismecausa.com. |
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