Pursuing the Perfect Low-k Dielectric
Laura Peters, Senior Editor -- Semiconductor International, 9/1/1998
L ast fall's announcements by IBM and Motorola of plans to use copper interconnects as soon as 1998 came as a surprise to many who consider low-k materials to be more enabling than copper, with benefits beyond device speed improvements through lower RC (resistance X capacitance) delay. Low-k dielectrics not only lower line-to-line capacitance, but also reduce cross-talk noise in the interconnect and alleviate power dissipation issues.
It seems the many challenges of integrating and attaining a net low-k in production devices convinced companies to switch to copper first, especially with expected reductions in manufacturing cost. 1
Interconnect delay begins to dominate overall device delay at 0.18 µm, making copper and low-k transitions so attractive (Fig. 1). Increasing device capacitance (Fig. 2) is remedied by reducing dielectric constant (k) from ~4.0 for SiO2 to 3.0, 2.0 and as close to 1.0 as possible. So while the jump to copper was interpreted by some as a setback for low-k, recent progress in integrating various low-k materials is quite encouraging. Importantly, while the Semiconductor Roadmap calls for dielectrics with k=2.5-3.0 for 0.18 µm devices and 2.0-2.5 at 0.15 µm, it appears the industry is being more conservative, implementing k=3.0-4.0 at 0.18 µm and 2.5-3.0 at the next technology node, 0.15 µm or 0.13 µm.
Spin-on
polymers address critical k=2.5 realm for 0.18-0.15 mm devices. (Source:
AlliedSignal)
Leading candidates
for low-k
Table 1 lists the most promising candidates for low-k innerlevel dielectrics (ILDs), along with key performance parameters. Early winners include hydrogen silsesquioxane (HSQ) and fluorinated oxides delivering k of 3.0 and 3.5, respectively. For k below 3.0, organic polymers such as poly(arylene)ethers (PAE), benzoncyclobutene (BCB) and an aromatic hydrocarbon show promise, as do silicon-based CVD films. For ultralow-k(<2.0), feasible spin-on candidates include nanoporous silica films (k=1.3-2.5), porous polymers and polytetrafluoroethylene (PTFE) (k=1.9).
The best low-k dielectrics perform reliably upon integration with the manufacturing process, exhibiting high thermal stability (to 425°C), mechanical stability and compatibility with etching, stripping, cleaning and polishing processes (Table 2). "Integration is the single most important challenge for low-k materials," said Farhad Moghadam, vice president and general manager of dielectric deposition and emerging technologies at Applied Materials (Santa Clara, Calif.). Extendability of low-k materials will minimize integration risk and cost. Thermal compatibility with assembly and packaging processes over 400°C is also a key requirement.
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Table 1. Likely Low-k Materials for ULSI Interconnects |
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| Dielectric | Dielectric constant (k) | Glass transition temperature (Tg)(°C) | Refractive index | Water absorption (%) | Stress (MPa) | Gap fill (µm) | Cure temperature (°C) | Weight loss (%wt) at 450°C |
| FSG (silicon oxyfluoride, SixOFy) | 3.4-4.1 | >800 | 1.42 | <1.5 | -130 | <0.35 | no issue | none |
|
HSQ (hydrogen silsesquioxane) |
2.9 | >500 | 1.37 | <0.5 | 70-80 | <0.10 | 350-450 | <3 |
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Nanoporous silica |
1.3-2.5 | >500 | 1.15 | TBD | 0 | <0.25 | 400 | none |
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Fluorinated polyimide |
2.6-2.9 | >400 | D RI >0.15(ai) | 1.5 | 2 | <0.5 | 350 | <0.1 |
| Poly(arylene) ether | 2.6-2.8 | 260-450 | 1.67 | <0.4 | 60 | <0.15 | 375-425 | <1.0 |
|
Parylene AF4 (aliphatic tetrafluorinated poly-p-xylylene) |
1.548 | T melt>510 | D RI 2.5 >0.09(ai) | 100 | 0.18 | 420-450 | 0.5 | |
|
PTFE (polytetrafluoro- ethylene) |
1.9 | -100 | 1.34 | <0.01 | 25-27 | <0.30 | 360-390 | 0.8 |
|
DVS-BCB (divinyl siloxane bisbenzocyclobutene) |
2.65 | >350 | 1.561 | <0.2 | 30-35 | <0.22 | 300 | <1.0 |
|
Aromatic hydrocarbon |
2.65 | >490 | 1.628 | <0.25 | 55-60 | <0.05 | 400-450 | <1.0 |
|
Hybrid-silsesquioxanes |
<3.0 | T melt>250 | 1.58 | 0 | 30-40 | <0.1 | 450 | 6 |
| Organic | Inorganic | |||||||
| Table 2. Requirements for Low-k Dielectrics | |
Film properties
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Manufacturing
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Fig. 1. Decrease in interconnect delay and improved performance are achieved using copper and low-k dielectrics. |
Whether companies migrate to Cu damascene structures or remain with Al processes for a time (and it appears that both will happen), low-k requirements will differ (Fig. 3). For example, high-aspect-ratio gap fill is critical in the traditional scenario. Liner materials, deposited using PECVD or high density plasma CVD (HDP-CVD), can be used to provide a moisture barrier, improve step coverage or enhance adhesion. Ken Monnig, director of interconnect at SEMATECH (Austin, Texas), explained how early low-k materials often could not fulfill the requirements for thermal stability, low outgassing and gap fill. "In the past, those were conflicting requirements," he said. "You could only get two of the three desired properties, but with these newer materials that are coming on line, there is a sweet spot where you can get most of the properties you want."
In a Cu damascene structure, dielectric gap fill is no longer an issue, but the deposited dielectric is sufficiently thicker than ILDs used in subtractive processes. Liner oxides may be required, and capping layers, which increase the mechanical stability of the dielectric during Cu CMP, typically are used. Nitride or oxynitride films are used frequently for dielectric etch stop. The low-k dielectric must be compatible with tantalum (Ta), TaN and TiN barrier films.
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Fig. 2. Lowering k compensates for increasing capacitance. |
"One challenge in etching structures with traditional oxides and low-k materials is maintaining vertical profiles without compromising throughput," said Dr. David Hemker, senior director of new product development at Lam Research (Fremont, Calif.). "By optimizing chemistries for these dissimilar materials for an in-situ process, need for additional etch chambers can be eliminated."
What makes a good dielectric?
The effectiveness of a non-conductor (dielectric) at storing electrical potential energy under the influence of an electric field is measured in its permitivity or dielectric constant (denoted as e or k). The lowest attainable k is 1.0, that of air. Net k value depends on film chemistry and deposition method. For example, thermal oxide has k of 3.9, whereas k of a PECVD oxide film is 4.1-4.3. Similarly, k of thermal nitride is 6.0-7.0, but the range for PECVD nitride is 6.0-9.0.
There are over 100 parameters of interest in dielectric films. In 1993, SEMATECH and member companies determined the 20 most critical parameters, selected testing methods and recommended screening limits. "This list is still being used as the benchmark tool for evaluation of dielectrics," Monnig said. "A few things have changed. For instance, we not only measure dielectric constant at 10MHz but over a range of frequencies. But by and large, companies remain pleased with the screening procedures and like to apply the same 'yardstick' to all the dielectrics."
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Fig. 3. In the subtractive process, dielectric step coverage is an issue, whereas metal step coverage is an issue in damascene structures. |
An ideal low-k dielectric offers low-k with other properties that closely resemble those of thermal SiO2 , especially low leakage, low thermal coefficient of expansion(<10 ppm/8C), high dielectric breakdown voltage (2-3 MV/cm), low film stress, low water absorption, high cracking resistance, adhesion to other materials, etc. ILDs must also dissipate heat generated in metal leads. Unfortunately, low-k dielectrics are poorer thermal conductors than SiO2, with conductivities of 3.7 mW/cm8C for HSQ and 4.0 for nanoporous silica, relative to 12.0 for HDP-CVD oxides. For this and other reasons, oxide layers will continue to be used with low-k dielectrics. Finally, the low-k dielectrics must meet requirements of commercial availability, high purity, low cost-of-ownership, etc.
HSQ and FSG in production
CVD of fluorinated oxide (FSG) and HSQ spin-on material were the early winners for many 0.5-0.25 µm processes.
FSG, a silicon oxyfluoride (FxSiOy), yields k of ~3.5. The high electronegativity of fluorine reduces the polarizability of the film, decreasing its dielectric constant. FSG films are formed using PECVD or HDP-CVD tools, adding silicon tetrafluoride (SiF4 ) to the silane (SiH4), O2 and argon gases. About 6% fluorine content is the determined limit for ILDs because of the fluorine atoms' instability. Fluorine evolution from the oxide causes aluminum etching during via RIE, degradation of the Al/Ti/TiN/W plug interface and increased via resistance.2 However, with process optimization, stable FSG films can be formed. IBM successfully integrated FSG into 0.35 and 0.25 µm microprocessors, yielding equivalent via resistance, functional yield, electromigration and stress migration characteristics to HDP-CVD oxide films in the same application.2
Texas Instruments (TI, Dallas, Texas) began using HSQ ILDs at the 0.5 µm generation. George Toskey, marketing manager for low-k products at Dow Corning (Midland, Mich.) explained that while early interest in HSQ was for process simplification, as chip manufacturers migrate to the next generation, they look to HSQ for its low-k properties. "Through optimization of the curing process, using rapid thermal processing and other changes, we aim to reduce the dielectric constant of HSQ films from 2.9 today to 2.5," he said.
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Fig. 4. A multilevel aluminum structure with HSQ interlevel dielectric. (Source: IMEC) |
Dow Corning's HSQ material, available as Flowable Oxide (FOx ), has k of 2.9 after curing. HSQ was used initially only between metal wiring lines (where it was needed most), yielding an overall dielectric constant of 3.1-3.6 depending on the dielectric type and thickness used in the liner and capping films. HSQ was recently integrated into a device with five layers of Al interconnect (Fig. 4),3 using an oxide cap to improve HSQ stability during W-CVD and Al fill.
HSQ films are more susceptible than SiO2. During resist stripping and via sidewall polymer removal, k value of the HSQ film is raised near the sidewall. Furnace curing with low O2 content and a degas step prior to barrier metal deposition minimize moisture problems. While HSQ is compatible with current resist chemistries, specially formulated new products available from EKC Technology (Hayward, Calif.) and Ashland ACT (Columbus, Ohio) can further preserve HSQ integrity.
Silicon-based polymers: k=3.0
Some silicon-based spin-on poymers, extensions of production-proven SOGs, compete directly with HSQ with comparable dielectric constant, refractive index, thermal stability and gap filling capabilities. Like HSQ, extensions of SOGs are being used in single-step, non-etchback processes, re-placing mature partial-etchback processes. The SOG process is simplified; costs are reduced, and k is 2.8-3.0. Via poisoning, a critical issue for traditional SOGs, is less of an issue with newer spin-on polymers. Via poisoning occurs when etched/stripped dielectric sidewalls absorb moisture prior to via filling, leading to metal corrosion and high via resistance. For HSQ processing, care is required to maintain oxidativity and thermally stable Si-H bonds. However, the incorporation of a critical level of Si-C bonds results in more stable k values. New spin-on polymers are more robust due to increased film density and Si-C bond stabilizing effects.
AlliedSignal (Sunnyvale, Calif.) recently released a new spin-on copolymer, T-23, following this design rationale.
Spin-on polymers: k= 2.5 2.8
The greatest amount of competition today exists in the k=2.5 arena. Properties of thermal stability, adhesion and mechanical strength are particularly important. Likely spin-on candidates at k=2.52.8 include silicon-based polymers with higher organic content, an aromatic hydrocarbon, PAE films and divinyl siloxane BCB (DVS-BCB).
Fluorine evolution from the oxide in FSG films causes engineers to be concerned about integrating fluorine-based polymers. In Cu damascene structures in particular, fluorine readily attacks tantalum-based barriers, leading to volatile TaF2 formation and loss of low-k/barrier adhesion. Sources said this remains a key impediment to damascene integration of fluorine-based low-k materials with copper.
Most spin-on organic polymers are significantly different from spin-on glasses; moisture does not evolve during curing, and due to superior crack resistance, single layer deposition is usually possible. However, adhesion promoters usually are required. Factors responsible for polymer properties include the backbone chemical structure, polymer backbone rigidity and/or mobility and effects of deposition, baking, curing and annealing. Polymer curing often is performed in an inert environment to prevent the breaking of polymer bonds at high temperatures. "SOG is really a more complex system, because ambient water plays a role in the cross-linking reaction, wheras an organic polymer is preformed and is simply applied to the wafer," said Neil Hendricks, director of strategic technologies at AlliedSignal. It was reported previously that only one type of CVD film is thermally stable at 450°C;4 however, studies show several spin-on polymers can withstand 450°C temperatures for short periods.
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Fig. 5. SiLK and FLARE (not shown) polymers were integrated in a Cu damascene structure. (Source: Fujitsu) |
PAEs are one such class of polymers, aromatic structures that better withstand temperature cycling than aliphatic polymers. Schumacher (Carlsbad, Calif.) pioneered the use of nonfluorinated PAE materials, introducing its latest version, VELOX, in January. Jack Cleary, Schumacher's chemical product manager highlighted the material's excellent adhesion properties without a promoter and its ability to be polished without a capping layer. AlliedSignal's FLARE 2.0 product is also a PAE material with k of ~2.8. FLARE was designed for low outgassing and high thermal and mechanical stability. At AlliedSignal, Michael Fury and his team of CMP engineers are developing a proprietary slurry for polishing FLARE films. According to Hendricks, such progress indicates PAE's ability to address challenges of Al RIE and Cu damascene structures. Dow Chemical's SiLK material is another aromatic polymer, an aromatic hydrocarbon containing no silicon or fluorine.
A recent study by Fujitsu (Kawasaki, Japan) demonstrated one of the first integrations of organic polymers, SiLK and FLARE 2.0, in a two-level Cu damascene structure. Chosen due to their high thermal stability,5 SiLK and FLARE demonstrated little change in k value after five-hour anneals at 425°C. The process used TiN barrier layers, Cu and tungsten plugs, rather than a dual-damascene approach. An oxide cap acted as hard mask and CMP stopper. Fig. 5 shows the first level integration.
BCB is used widely as an ILD in multilevel metal GaAs devices while playing a role in multichip module assembly. Using an oxide hard mask to increase stability of BCB to 390°C, it is integrated with TiN barrier deposition, Cu fill by MOCVD and Cu CMP in a single damascene structure. 6 Dow Chemical is extending its Cyclotene BCB line to lower k by creating a well-controlled porous film. Similar activities are underway for porous SiLK products.
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Fig. 6. Three organic polymers demonstrate impressive barrier properties. |
A recent study demonstrated the barrier qualities of organic polymers (Fig. 6).7 "This study caused quite a stir in the industry, because everyone knew oxide was bad for copper migration and nitrides were good, but they never knew where the polymers came in," said Jack Braley, marketing manager of low-k products for Dow Chemical.
Even if low-k materials were completely impervious to copper, it is unlikely that barrier films could be eliminated. "There's really two issues for copper diffusion, through the low-k material itself and along the interfaces between materials," Monnig said. "The latter can cause leakage or charge storage effects in the interconnect, which could actually prove to be bigger issues than the poisoning of transistors by copper."
The k value of organic polymers possibly can be lowered by making such materials porous. "If you start with a k of 2.65 and put 20% porosity into that polymer, you can get down to 1.9," Braley said. "With an inorganic porous material like SiO2, you have to have 70% air to get the k down to 2.0."
Low-k CVD films: k=2.5 3.0
Films with k of ~3.0 can be formed using a low-k Flowfill CVD process developed by Trikon Technologies (Newport, Gwent, UK). The process reacts methylsilane (CH3-SiH3) with H2O 2 to form monsilicic acid, which condenses on a cool wafer and is converted into an amorphous methyl-doped silicon oxide. Annealing at 400°C for 30 min removes moisture. Beyond methylsilane, studies show a possible k of 2.75 using dimethylsilane in the Flowfill process.
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Fig. 7. Dielectric constant (k) depends on the incorporation of Si-CH 3 bonds in the oxide film, as measured by infrared absorbance. |
In HDP-CVD, methylsilane or dimethylsilane and O2 can provide k as low as 2.75 (Fig. 7). Trimethylsilane (not shown), available from Dow Corning, can be used to deposit low-k (2.6) dielectric films.
The methylesilane-based film is comparable to the spin-on material methylsilsesquioxane (MSQ), yet recent testing by Mitsubishi indicates that MSQ (k ~2.7), has a higher carbon content than the CVD film. 8 It appears that O2 plasma and post annealing do not decompose the CVD film easily, and nearly twice as much moisture outgasses from the spun-on film.
Applied Materials has plans to introduce an inorganic silicon-based CVD process called Black Diamond, which is being integrated with the company's high density plasma etching, Cu CVD seed layer, electroplating and Cu CMP processes. Figure 8 shows first-level integration of the process, which yields a net k value of 2.5.
An alternative CVD approach uses CH4 or C4F8 and low temperature (250°C) plasma CVD to create fluorinated amorphous carbon films (a-F:C).
Parylene aliphatic tetrafluorinated poly-p-xylylene (AF4) processes are offered by Novellus (San Jose, Calif.). The film delivers k of 2.25, while passing requirements for adhesion, via resistance and electromigration lifetime.9 Vapor-phase delivery of parylene poses special requirements. Paul Blackborow, vice president of marketing at MKS Instruments (Andover, Mass.), recommended use of a pressure-based MFC operating at 200°C to control parylene precursor flow rate, adding that gas delivery lines, gauges, valves, etc., should also be maintained at 200°C to avoid "cold spots" in the system.
Ultralow-k materials:k<2.0
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Fig. 8. Cross-section of k = 2.5 film created using ionized plasma etch, Cu seed layer, electroplating and Cu CMP. (Source: Applied Materials) |
PTFE ILD materials are chemically and electrically different from the form used in wafer carriers, high-purity piping and wet benches. In addition, PTFE and Teflon terms are not synonymous. Teflon is a DuPont tradename, referring to PTFE and a variety of other fluorine-based products. Raw PTFE is offered as PTFE micropowders, granular PTFE, PTFE dispersion and PTFE nanoemulsion.
W.L. Gore and Associates is in prototype production of a PTFE spin-on material with k of 1.9, the lowest attained using a non-porous organic material. The SPEEDFILM material is an aqueous emulsion containing sub-20 nm PTFE particles and surfactant. The film demonstrates good thermal stability at up to 400°C and has a 460°C decomposition temperature. SPEEDFILM is not commercialially available yet, but it has undergone adhesion testing, etching, CMP studies as well as electrical characterization and is being integrated into 0.15 µm devices. 10
Michael Mocella, senior technical consultant for DuPont's Electronic Gases Group (Wilmington, Del.), explained that PTFE CVD films, though less studied than the spin-on counter-part, might offer benefits of simpler modification of the film structure to optimize film performance. CVD of PTFE uses thermal (non-plasma) activation.
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Fig. 9. The tunable dielectric constant of amorphoes SiO2 indicates extendability to future generations. |
A leading inorganic material with k=1.32.5 is nanoporous silica, commercially offered as AlliedSignal's Nanoglass material, TI reported feasibility using Nanoglass in Al and single Cu damascene structures. Using 0.3 µm metal lines, the Cu/Nanoglass devices provided a 36% reduction in capacitance for lines of equal resistance and a 46% decrease in resistance for interconnects of equal capacitance. Nanoglass has a tunable dielectric constant (Fig. 9) that relies on pore density. High-temperature testing of Nanoglass films reveals a stable k of 2.0 in an uncapped film after repeated thermal cycling to 500°C.
IBM is characterizing porous organosilicates with k values of 2.2 at 20% to 30% porosity levels. These materials demonstrate high thermal stability and process simplicity. Dr. Robert Miller, manager of advanced organic materials at IBM's Almaden Research Center (San Jose, Calif.), explained how nanoporous inorganic-organic hybrids are created through the vitrification of low molecular weight silsesquioxanes in the presence of highly-branched thermally-labile aliphatic polyesters of controlled molecular weight and architecture. Then the thermally-labile pore generator is removed by heating to 350-400°C. The combined closed-cell pores and intrinsically hydrophobic matrix minimize the film's absorption of water, a feature that distinguishes these dielectrics from aerogels.
Another option, under development by Schumacher and Sandia National Laboratories (Albuquerque, N.M.), involves spin-on deposition of a silicon-based mesoporous material. The resulting film has a highly organized pore structure. According to Dave Roberts, director of technology at Schumacher, the mesoporous films potentially offer improved mechanical strength relative to conventional aerogel approaches.
Porous materials must be able to withstand polishing, etching and heat treatments without pore degradation. Monnig hightlighted some outstanding questions."How do you put a via in a porous material? Can you polish over it?" he asked. "If etch gas gets in a pore, will it outgas?" Regarding pore size distribution, Monnig added, "The current thinking is that uniform pore size is needed, but I don't know that anybody has proven that." SEMATECH's activities in ultralow-k this year include the development of measurement techniques for porous films, dielectric constant, Young's modulus and other parameters. "We've had to reinvent the measurements to try to get a fundamental understanding of their properties," Monnig said. "Beginning early 1999, we will be characterizing and integrating porous materials into device structures."
Conclusions
While there is no perfect low-k material, several dielectrics are being
integrated successfully into device structures including HSQ, SiLK,
FLARE, VELOX, BCB and organic and inorganic CVD films in the critical
k=2.5 arena. At 2.0 and below, porous extensions of organic polymers
will compete with nanoporous silica, PTFE and other materials. Time will
tell whether several low-k materials will find their way to
manufacturing or if the industry will select, for instance, three
dielectric solutions to satisfy the entire k=3.0-1.5 realm. 
References
- P. Singer, "Tantalum, Copper and Damascene: The Future of Interconnects," Semiconductor International, June 1998, p. 90.
- D.S. Armbrust, et.al., "Integration of HDPCVD FSG for 0.25 µm CMOS Technology," DUMIC Proceedings, 1998, p. 67.
- H. Meynen, et.al., "The Integration of Low k Hydrogen Silsesquioxanes (HSQ) in sub-0.35 µm Processes," Proceedings from ECS Symposium on Low and High Dielectric Constant Materials, May 1998.
- J. Baliga, "Options for CVD of Dielectrics Include Low-k Materials," Semiconductor International, June 1998, p. 139.
- M. Ikeda, et.al., "Integration of Organic Low-k Material with Cu-Damascene Employing Novel Process," IEEE International Interconnect Technology Conf., (IITC), June 1998, p. 131.
- G. Passemard, et.al., "Single Damascene Integration of BCB with Copper," VMIC Proceedings, June 1998, p. 63.
- Loke, et.al., "Copper Drift in Low-k Polymer Dielectrics for ULSI Metalization," Symposium on VLSI Technology, June 1998.
- M. Matsuura, et.al., "A Highly Reliable Self-planarizing Low-k Intermetal Dielectric for Sub-quarter Micron Interconnects," IEDM Proceedings, 1997.
- J. Gaynor, A. Ralston, "AF4 as a VLSI Interconnect Material," Semiconductor International, December 1997, p. 73.
