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Lessons from Fab Woebegone

Michael F. McGraw, Ph.D., SEMI/SEMATECH, Austin, Texas; William E. Rowe, Rowe Consulting, South Hero, Vermont -- Semiconductor International, 10/1/1998

Application of cost modeling methodology reveals significant cost advantages to 300 mm fabs even if equipment and raw wafer prices are higher than anticipated by device manufacturers. A modeled 300 mm fab is expected to offer a 54% reduction in device cost assuming equipment utilization similar to today's advanced 200 mm fabs and $600 per 300 mm raw wafer cost. An increase in capital cost of 300 mm equipment from 1.3-1.7X the cost of 200 mm equipment results in a 12-14% increase in cost per wafer. Yet even a 1.7X equipment cost and a cost $1200 per raw wafer provide a lower finished 300 mm wafer cost per unit area than wafers from a new 200 mm fab. However, economic analysis of upgraded 200 mm fabs reveals cost per device comparable to 300 mm fabs in the short term, even with a $600 silicon cost and 1.3X tool cost. Efforts will continue to focus on extending existing 200 mm facility life through yield increases and productivity optimization until demand justifies building 300 mm fabs.

Modeling 300 mm Fabs

In 1993, SEMATECH and SEMI/SEMATECH identified the fab cost crisis involving billion dollar fabs as being a capital productivity problem, dependent on utilization of capital equipment in fabs, which averaged approximately 30% at that time. Though equipment costs have been described as "out of control," information dating back to the early 1970s indicates a constant increase in tool cost of 12-14% CAGR plotted on a semi-logarithmic scale.1 This increase can be seen as a natural consequence of Moore's Law, reflecting the increased complexity of tools needed to manufacture devices with scaled geometries and increased functionality.

The average productivity gain from wafer size transitions is approximately 4% per year.2 I300I and SELETE consortia developed ambitious equipment performance and cost goals to ensure that the transition to 300 mm will be economically advantageous for semiconductor producers.3 However, since these goals were developed from the device manufacturers' viewpoint, we felt a more objective analysis of potential cost advantages of 300 mm fabs was needed. For example, the cost of 300 mm equipment was to be no more than 1.3X the cost of equivalent 200 mm equipment, and the tool space requirement was to be no more than 10% more than 200 mm tools. We developed a scaling model to provide an objective analysis of the impact of larger variables of tool cost and raw wafer cost variations on processed wafer costs. It allows the comparison of 300 mm fabs

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Fig. 2. The modeled 300 mm Realistic fab offers a 54% reduction in cost per unit area relative to a new 200 mm fab.

of varying raw wafer and tool costs and tool productivity. Though total manufacturing cost of an advanced microprocessor device depends on fab, assembly and packaging (A&P) and test costs, contributing approximately 50%, 40% and 10% respectively to total cost, our analysis will address only the fab portion. As processing costs are reduced, overall costs are dominated increasingly by material costs in both the fab and A&P areas and hence exert greater leverage on fab productivity. The majority of these materials are not manufactured in the United States, making it important to maintain balance between productivity improvement activities in process and material areas.

 We chose to use the SEMATECH CRM version 4.4.1 as the base model software.4 We assumed an advanced microprocessor fab making relatively few chip designs with a single process. A SEMATECH 180 nm logic process flow with 19 mask levels and six levels of aluminum-based wiring was used, which is generally consistent with the requirements of the 1997 National Technology Roadmap for Semiconductors (NTRS).5 Straight-line depreciation was assumed over five years for fab equipment and 25 years for the facility, which operates 356 days a year and 24 hrs a day. Production capacity was 20,000 wafer starts per month. Test wafer usage was set at 10% of production starts. These parameters were used in past SEMATECH fab models. I300I tool performance metrics provided the basis for determining 300mm tool parameters.6 The 200 mm tool parameters were derived from SEMATECH projections and data. Die sizes, defect densities and the yield model all came from NTRS. Wafer costs were calculated for the third full year of operation only, when the fab was mature.

Click for larger image.

Fig. 3. A 31% increase in tool cost (1.3-1.7X) increases cost per unit area by 14%.

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Fig. 4. Historically, starting wafer cost per square centimeter has decreased an average of 9% per year. The 300 mm wafer price goal is $600 by 2001.

The equipment performance parameters from I300I and SEMATECH represent ideal conditions. Because the CRM does not calculate the effects of set-up and wait times associated with statistical variations in tool, product and operator availability, its output generally represents highly idealized fabs. We developed idealized CRM fab models and more realistic fab models. Inputs to Realistic fab models were adjusted based on current (200 mm) fab performance and experience. For the Ideal 300 mm fab we set tool throughput and availability equal to the I300I specifications as defined in the SEMATECH publication "180 nm Equipment Performance Metrics." For the Realistic fab we adjusted tool throughputs from I300I and SEMATECH specifications by multiplying by a factor of 0.5-0.9 depending on tool type. Tool availability was assigned values between 80% and 95%. For bottleneck tools, the lithography clusters, we multiplied availability by 0.85 and by 0.8 for other tools to account for engineering and idle time. The Ideal fab has no allowance for delays, contingency or reduced throughput and is a balanced fab with no defined bottleneck.

Based on these assumptions, cost of the Realistic 300 mm fab was estimated at $1.76 billion and the Ideal fab cost at $0.91 billion. The Ideal cost is less than the published costs for current 200 mm fabs and is reflected in the aggressiveness of I300I goals. In each case, equipment costs accounted for 75% of the total, while facility costs accounted for 25%. Breakdown of cost per wafer of the two fabs at maturity (Fig. 1) shows a 42% difference in cost, with the Realistic fab requiring more tools for the same output, with accompanying increases in tool maintenance, facility and personnel costs. Product wafers and materials costs are unaffected largely, as they are based on fab output.

Alternatively, processed wafer cost per square centimeter is $7.10/cm2 for a Realistic 200 mm fab, relative to $4.56/cm2 for the Realistic 300 mm fab producing 20,000 wafers per month at maturity, a 54% difference (Fig. 2). This represents a 54% productivity gain associated with 300 mm conversion, assuming a $600 per raw wafer cost. We expect other 300 mm productivity improvements beyond this, resulting from advances in automation, wafer handling efficiency, CIM systems and better tool operational efficiency. Silicon wafer area gain with 300 mm amounts in a 2.6X increase in dice output due to the 225% area increase and gains in utilization around the perimeter of the larger wafer. In our example, the 300 mm fab processes 177 dice per 300 mm wafer (340 mm2 die size), versus 69 dice per 200 mm wafer.

Capital Equipment Cost

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Fig. 5. Reduction in wafer price from $1200 to $600 provides a 19% reduction in cost per unit area in the Realistic fab and a 29% reduction in the Ideal fab.

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Fig. 6. The upgraded 200 mm fab cost per unit area is on par with the new 300 mm fab cost per unit area.

The I300I price target for 300 mm equipment is 1.3X that of equivalent 200 mm equipment. We varied the 300 mm price from 0.9X to 1.7X using our scaling model, holding all other parameters constant. The change from 1.3X to 1.7X, a 31% increase in equipment price, adds 12% to finished wafer cost for the Ideal 300 mm fab and 14% for the Realistic fab (Fig. 3).

Cost of Silicon

Based on information from VLSI Research and Rose Associates (both in San Jose, Calif.), there are notable trends in silicon wafer consumption from 50 to 200 mm wafer sizes7, including:

A 10% CAGR of total area of silicon consumed per year,

  • Peak consumption of a given wafer size at 60% of the total annual consumption of silicon,
  • A 10-12 year period before peak consumption is reached,
  • A noticeable incubation period prior to initiation of sustained growth for any new wafer size and
  • A 9% per year decrease in cost per unit area of silicon, regardless of wafer size (Fig. 4), due to increasing wafer manufacturing efficiency and consumption levels.8

The model again was applied to understand the impact of wafer price on cost per wafer. Following the historical decrease of 9% per year, starting 300 mm wafer cost of $1200 in 1998 would be reduced to about $900 in 2001 (see Historic 300 mm line in Figure 4). However, the I300I target calls for a decline in price from $1200 (early 1998) to $600 in 2001, requiring a 20% annual decrease in raw wafer cost. As shown in Figure 5, this $600 decrease in wafer price provides a 29% reduction in product wafer cost for the Ideal fab and a 19% reduction in wafer cost for the Realistic fab.

Current conditions for the majority of wafer manufacturers show an excess of capacity and declining wafer prices due to lower valuation of the Yen. Prices as low as $700 each have been reported for 300 mm wafers. At the time of writing, we did not know the quality of these wafers, but we believed they did not meet device-grade quality requirements for 180 nm manufacturing yet.

The useful lifetime of new fabs typically is extended beyond the current device generation by selectively replacing and upgrading equipment. In a separate analysis, we compared the cost of wafers from an upgraded 200 mm fab with similar costs from 200 and 300 mm Realistic fabs. We upgraded a 250 nm advanced MPU fab to a 180 nm MPU fab in the third and fourth years of operation. Exposure cluster, critical etch and metrology tools were replaced. Fab capacity of 20,000 wafer starts per month was maintained by adding required new tools. Space and personnel were changed in the model based on equipment changes. The upgrade required 35 new tools; total capital cost was $228 million. The calculated cost per square centimeter for the upgraded 200 mm fab in 2003 was substantially less than that of a new 200 mm fab and slightly less than the 300 mm fab (Fig. 6). The lower cost is a consequence of the five-year depreciation rule, which reduces the cost per wafer from the upgraded fab in its sixth year.

We expected the upgraded fab to have a higher defect density and lower probe yields than the new fab because of previous generation equipment. We estimated the cost of good MPU dice from each fab by developing a simple yield model based on the NTRS yield model, equipment defect density projections and die size data. Results showed that the 300 mm fab, despite its higher cost/cm2 shown in Figure 6, yields a lower cost per good MPU than even the upgraded 200 mm fab. Production cost is approximately $29/die in the new 200 mm fab, $20/die in the upgraded 200 mm fab and $17/die in the new 300 mm Realistic fab, a 40% savings from the new Realistic 200 mm fab. The average defect density for the 300 mm fab in 2003 was assumed to be 596 d/m2. The upgraded fab was assumed to have a defect density of 1247 d/m2 in 2003 from its mix of new and previous-generation tools. Die size was 140 mm2.

Conclusions

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Fig. 7. Fab cost per unit area shows greatest reduction from productivity improvements, followed by wafer and tool costs.

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Fig. 8. Advantages to the 300 mm transition are greater if increases in yield and tool utilization can be realized.

Cost per unit area is influenced most by productivity improvement or making improvements in equipment utilization between the Realistic and Ideal fabs (Fig. 7). While the upgraded 200 mm fab offers the lowest cost per square centimeter, higher yields expected in 300 mm fabs lead to lower cost per MPU produced (Fig. 8). We expect 300 mm fabs to offer the cost advantages shown, with additional reductions due to the design of a comprehensive tool set based on standards for improved compatibility and efficiency. However, this analysis only addresses the question of product cost in a 300 mm fab; it does not address requirements of financing a 300 mm fab. Increased utilization of existing fab capacity along with the high initial price and risk associated with building 300 mm fabs will drive the extension of existing fabs in the short term.

Since equipment suppliers are bearing the cost of 300 mm tool development, a large potential customer base and rapid ramp-up of 300 mm fabs are crucial to the financial health of the industry. As anticipated 300 mm fabs have been delayed, equipment suppliers increasingly have become reluctant to spend more on 300 mm development and have focussed efforts on improving 200 mm capability, working on bridge tools and supporting new technologies such as copper interconnect and low-k dielectric insulators. Extending 200 mm capacity will prove cost-effective for a while but cannot compete with economic advantages offered by 300 mm wafers in the long run. Silicon wafer prices and equipment prices are not significant impediments in the long term, as 300 mm fabs will prove economically advantageous even with higher than anticipated prices.

References

  1. VLSI Research Corp., San Jose, Calif.
  2. J. Owens, "The Productivity Challenge," SEMI Industry Strategy Symposium, January 1995.
  3. "Unified Equipment Performance Metrics for 0.25 µm Technology," International 300 mm Initiative/SELETE, November 1997.
  4. Users Manual, Cost Resource Model Version 4.4.1, SEMATECH, December 1996.
  5. "The National Technology Roadmap for Semiconductors," Semiconductor Industry Assoc., 1997.
  6. "180 nm Equipment Performance Metrics," Tech. Trans. #97093360A-ENG, I300I, 1997.
  7. "Executive Advisory - Wafer Size Lifetime Analysis and Forecast," VLSI Research, June 1994.
  8. D.J. Rose and L.L. Sheet, "Silicon: The Conflict Between Price and Perfection," Current Magazine, January 1998, p.8.

Acknowledgments

The authors would like to thank Carl Cunningham of SEMATECH and IBM for his valuable assistance with the Cost Resource Model and SEMATECH data files.

 

Dr. Michael E. McGraw is director of plasma/process technology at SEMI/SEMATECH. His activities have included the Capital Productivity Program, 300 mm and most recently Value Chain Engineering. He joined SEMI/SEMATECH in 1989 and prior to that he held various engineering and management positions at Veeco Instruments and Texas Instruments.

Rowe

Bill Rowe is an independent consultant to the semiconductor industry, specializing in fab and equipment productivity. Rowe formerly worked in IBM's microelectronics division where he held management and technical positions in equipment, manufacturing, development and yield engineering. As a SEMATECH assignee he managed the Capital Productivity Program, which established industry goals for 250 nm generation equipment performance. He holds bachelor's and master's degrees in physics from the University of Vermont. He can be contacted at 802-372-5348 or roweco@pobox.com.

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