Linking European Suppliers with Global Users

		At a Glance
	The Esprit Semiconductor Equipment Assessment (SEA) initiative is a link between European equipment manufacturers and semiconductor manufacturers worldwide. Its objective is to ensure that state-of-the-art equipment and innovative process techniques that have been developed in Europe meet all the production manufacturing requirements of the mainstream users. Examples of successful results are given.

The Esprit Semiconductor Equipment Assessment (SEA) initiative started in early 1996 and has established strategic links between European equipment manufacturers and semiconductor manufacturers worldwide. It is targeted at proving and enhancing the production capabilities of the equipment and also at disseminating the results of the assessments to the global marketplace.

The equipment is evaluated at industrial user sites, mainly IC manufacturers, or industrial research centers. The suppliers install the equipment and provide the on-site support and any equipment improvements required to meet the users' manufacturing objectives.

Each project is driven by at least two industrial users that provide specifications and metrics in accordance with their production requirements. They all participate in the assessment and provide feedback to the suppliers.

A major goal of SEA is to improve access to the project assessment results to potential users worldwide. The dissemination organization for this is centered at the Rutherford Appleton Laboratory (RAL) in Oxfordshire, UK.

Current projects

Currently, there are 28 such projects (Table 1) active at user sites involving 27 European equipment companies and 31 industrial users from Europe, the United States and Southeast Asia. Five European industrial research organizations are also participating. The projects are based on six major themes with 10 topics: hot processes, lithography, dry etching metrology, metalization/planarization, wafer cleaning/environmental control and back-end (assembly/test).

Table 1. Current SEA Projects

The users include many large IC manufacturers and a significant selection of European equipment manufacturers; all leading European industrial research organizations are also participating. A feature of SEA is the participation of IC companies from the United States, Taiwan and Korea (Table 2). It should be noted that such companies that are inward investors to Europe are eligible to participate not only as partners, but also as European evaluation sites. All European IC companies are involved, including those in the Microelectronics Development for European Applications (MEDEA). The bracketed figures indicate the number of projects in which each company is active.

Table 2. IC manufacturers Participating in SEA Programs

While the initial focus is on 200 mm equipment, there is a phased approach to 300 mm equipment evaluation in SEA, with eight projects already active. IC manufacturers are predicting large gains in capacity improvement for a move from 200 mm to 300 mm wafers (ranging from 2X to 3X). In a buoyant market this looks very attractive. However, it is important to recognize that full 300 mm production will not be available until the year 2000, will cost companies billions of dollars to prepare for and will cost $1-2 billion for the facility. It is interesting to note, therefore, that the sum total of improvements from throughput, yield, improved utilization and flow reduction can give a potential improvement of 4.5X capacity, double that of a 200 mm to 300 mm change.

It is such issues that are being addressed in the current SEA projects on up to 200 mm equipment. The improvements achieved will benefit the industry since market predictions indicate that 200 mm equipment will outsell 300 mm versions well into the first decade of the new millennium, and of course, improvements will migrate through to the 300 mm versions.

Since no commercial 300 mm facilities currently exist to act as evaluation sites, SEA projects have now been approved for the evaluation of 300 mm equipment at I300I in the United States and SELETE in Japan, followed subsequently at selected European sites.

Additionally, a fast and flexible infrastructure has been established called SEA300 for implementing demonstration tests for 300 mm equipment at the equipment suppliers' site. This is to enable European equipment companies to get early input from users on their prototype 300 mm equipment.

The administration and dissemination for SEA300 are again provided by RAL, while processed 300 mm wafer and evaluation services are being provided from a silicon Service and Procurement Centre (SC) based at GRESSI-CNET in Grenoble, France. Implantation services have been established at GRESSI-CNET that have already been used for SEA300 projects. A litho cell with an excimer laser exposure tool is also being established there, which will enable the supply of processed wafers with layered submicron structures.

There are eight 300 mm SEA and SEA300 projects approved, including ones for cleaning, handling metrology and test. SEA300 projects include RTP, front-/backside wafer etching, sputtering for high-aspect ratio submicron hole fill and microwave batch resist stripping (Table 3). Most of the SEA300 projects follow successful SEA projects. In total there are now 35 SEA/SEA300 projects, with more in the proposal evaluation phase.

Table 3. 300 mm SEA Projects

SEA projects -- evaluation at user sites
Theme	Equipment supplier	Users	Project	Acronym
Metrology	PLASMOS	GRESSI, ST, SELETE, I300I	Fully automatic ellipsometer for 300 mm wafers	FLASH PT300
Cleaning/ environment	DMS	ST, I300I	300 mm pod and open cassette centrifugal cleaner	CFC
Automation	RECIF	INCAM, I300I, Intel	300 mm front-opening pod and cassette sorter	POCS
Test	Karl Suss	FhG-IIS-B	Automated 300 mm prober system	AUTOPSY
SEA300 projects -- demonstration tests at equipment manufacturer sites
Hot processes	STEAG AST	SIEMENS, GRESSI	RTP implant annealing	IMAN 300
Cleaning/etch	SEZ	I300I	Single-wafer front- and backside etcher	WM 303
Sputtering	TRIKON	SIEMENS	High-aspect ratio submicron hole fill	FF300
Ashing	TePla	SIEMENS	High-throughput low-COO, low-damage batch asher	RAPID

With the addition of SEA and SEA300, the European Union's re-search and development activities are structured to cover the full spectrum of equipment issues in a phased manner -- from research through development in its LTR and TCS programs, to production evaluations both at current wafer sizes and on 300 mm equipment in SEA. Successful results are now emerging from the initial SEA projects.

Surface imaging and process latitude

Project EDUSA is an assessment of the ASML DUV stepper for which the Industrial Research Centre IMEC is the node. A feature of this project is the high number of IC manufacturers involved: five from Europe, four from the United States and three from Asia.

The main objective is to demonstrate the capabilities of the DUV stepper for 0.25 µm (250 nm) process technologies. The system is being integrated with a state-of-the-art litho cell and its performance compared to its main
competitors.

1. Project EDUSA has shown that a top surface imaging process can achieve resolution down to 0.15 µm, with good process latitudes for 0.175 µm line/spaces.

The early results from this project are very promising. Using a top surface imaging process, resolution down to 0.15 µm (150 nm) has been obtained, while good pro-cess latitudes for 0.175 µm line/spaces with a depth of focus of 1.15 µm and a 17.5% exposure latitude have been achieved (Fig. 1).

The ASML stepper features illumination settings that can be continuously varied. This en-ables optical proximity effects to be eliminated or greatly reduced. It also allows rapid compensation of resist or etch variances to improve CD control. Also, in detailed tests, high throughput was achieved because, in part, of the unique AERIAL illuminator, which avoids the serious reduction of intensity at low sigma settings. This resulted in a 90% throughput improvement for one partner compared to a competitor's system.

These early results should give the IC manufacturers some comfort that the next two generations of scaling (0.25 µm and 0.18 µm) can be covered with this technology. The project is continuing to establish the full manufacturing performance figures at the 0.25 µm level that have been set by the industrial partners.

Microwave batch asher project

Project EMW evaluates the TePla microwave batch asher designed for low ionic damage, good uniformity and high throughput. Gate oxide integrity has been maintained by utilizing a microwave plasma that gives a lower plasma potential at the higher frequencies (Fig. 2). As a result, the system exhibits damage-free resist removal that compares favorably with low frequency ashers and even wet chemical strippers.

The system's productivity has been compared with four ashers from two competitors for the removal of 1.5 µm of implanted resist (B, P 6E15 80keV, no DUV). The trials have now been carried out over 300,000 wafers, and partners Sie-mens and ZMD said it is production proven with high throughput (85 wafers/hr), low defect density, no plasma damage and low cost-of-ownership.

Project Forcefill

The Forcefill project has been implemented at TI Freising, a mainstream U.S.-owned production facility that runs a 0.5 µm multilayer metal BICMOS process. Ericsson AB is the other partner.

The project evaluates a complete TRIKON sput-tering system, including the Forcefill technique in which aluminum is deposited at a high rate to seal contact holes and vias, leaving a void in the hole. The wafer is then transferred to the dedicated high pressure Forcefill chamber that applies ~60 MPa to the wafer at typical temperatures of ~400 °C to fill all sealed holes. This gives excellent submicron, high-aspect  ratio hole fill and planarization.

During the project, extensive use was made of MARATHON and IRONMAN reliability testing methodologies to identify failure mechanisms. The accumulated data were fed into equipment improvement programs, resulting in improved design and procedures (Fig. 3).

3. Reliability tests helped tool developers to improve equipment performance, with MTBF rising progressively to 232 hrs.

The data clearly show the improvement in tool performance realized during the project, with MTBF rising progressively to 232 hrs, availability for operation (AO) approaching 90% and an uptime in excess of 90% (AO + wait time). The via resistance control and reliability were both shown to be very good.

Metrology

From the metrology theme, project IMPROVE evaluates the SOPRA spectroscopic ellipsometer (SE). It has a multiwavelength capability incorporating an optical multichannel analyzer (OMA) and microspot capability. This enables it to be used  for measurements on very thin composite layers (up to five) on product wafers with high throughput.

In this project there are three in-dustrial users -- AMS, GPS and TEMIC -- while the node is an industrial research organization DERA. DERA has a renowned cap-ability for producing the accurate calibration and optical analysis data.

The project's main goal is to prove its effectiveness for in-line monitoring for production process optimization and verification. There is an urgent need for such equipment to reduce wait times and the number of test wafers used, which is now reaching endemic proportions in modern pro-cesses.

4. The measured values of thickness computed for this oxide/poly/oxide structure using a spectroscopic ellimsometer are compared with SIMS and TEM measurements.

The measured values of thickness computed for this oxide/poly/oxide structure are compared in Figure 4 with SIMS and XTEM measurements also made at DERA. It can be seen that they all give very close results. The power of the system lies in it being accurate, nondestructive, rapid and physically meaningful even down to detection of the poly-oxide interlayer.

Project Autowet

The STEAG MicroTech automated wet processor "Twin Clean" (project Autowet) evolved from cleaning concepts developed at industrial research institutes IMEC and LETI. This led to a replacement for the standard RCA clean that drastically reduces chemical and DI water consumption while giving equivalent, or better, cleaning performance and electrical results. It has been successfully evaluated by ST Agrate, with Philips as a partner, for the critical cleaning steps in Flash EPROM and advanced CMOS processes. This was proved by having a hybrid system that could accommodate both Twin Clean and RCA clean for meaningful comparative analysis (Table 4).

Table 4. Chamical and Water Consumption

Electromigration testing

Jeff Bruchez (SEA/SiTeC) has worked in the microelectronics industry for 30 years, holding senior positions in R&D, IC manufacturing and with semiconductor equipment companies. He is now an independent Silicon Technology Consultant and is director of SEA Dissemination. Georg Kelm(CEC) has worked for 20 years in the microelectronics industry, holding positions in R&D in the fields of Non-volatile memories, layer process development and equipment evaluation. He now works for the EC as principal scientific officer and is responsible for European Equipment and Material Programs. Director - SEA Dissemination: Jeff Bruchez SEA Office Central Microstructure Facility Rutherford Appleton Laboratory Chilton, Didcot, Oxfordshire, OX11 0QX, UK Tel: +44(0)1235 445946 Fax: +44(0)1235 446174 E-mail: sea@rl.ac.uk URL: http://www.sea.rl.ac.uk/

Project EMMEA evaluates DESTIN's very high-resolution, electromigration test system, which enables rapid,
low-cost electromigration testing by using Early Resistance Change (ERC) techniques. It is being evaluated at Mietec (Belgium) with Philips and Siemens as partners.

Research showed that test time was reduced by a factor of four. Another benefit is that the stress conditions for accelerated life test can be reduced by a factor of three to 10, which reduces the possibility of erroneous failure conditions occurring. The system has also been demonstrated on bond ball reliability for automotive power products.

COTRED project

Finally, Project COTRED evaluates the implementation of parallel (x4) die testing with the Schlumberger ITS 9000CV mixed function tester in the cost-sensitive area of Analog-Digital-eeprom microcontroller testing. Extensive work between the partners SGS Thomson, Temic-Matra and Schlumberger, based on the production implementation of parallel test has resulted in a halving of the cost of test.

Conclusion

The strategic decisions on equipment choice are now made very early in the technology development cycle. The impact of this is exacerbated by major IC companies sharing ideas and decisions in collaborative programs that are proliferating as the high cost of technology development and production are shared.

Also, the rate of introduction of new technology is accelerating, and equipment is playing the leading role in this evolution by supplying the enabling tools with innovative techniques for evolving process technology. The cost reductions demanded from our industry require the process innovation-equipment productivity gap to be rapidly crossed.

The business, financial and technology trends in our industry necessitate an increasing demand for regional and global cooperative alliances between equipment manufacturers and users. SEA has created the environment for European equipment companies to work with IC manufacturers, globally, in proving that their products can compete with the best and offer innovative processes with both high quality and productivity.