European Technology Swings to Applications

		At a Glance
	Directing collaborative efforts among European firms, the Microelectronics Development for European Applications (MEDEA) has selected 45 projects focusing on multimedia, communications and automobile/traffic. This article gives an overview of MEDEA activities and an update on technology developments and new fab construction among major European companies. Also discussed are strategies for the sub-100 nm generation of devices and SiGe for telecommunications.

The four-year pan-European collaborative project, Microelectronics Development for European Applications (MEDEA), was established to ensure the continued industrial competitiveness of the European industry into the next millennium. Since its inception in January 1997, MEDEA has evaluated 125 proposals and selected 45 major projects covering a wide variety of key technologies and applications involving 59 partners from nine countries, representing a total of 2000 man-years of work. Nearly two-thirds of MEDEA's budget is targeted for applications.

MEDEA is overseen by the European Research and Coordination Agency (EUREKA, project 1535) and is the successor to the Joint European Submicron Silicon Initiative (JESSI). It was not until the late 1980s that extensive collaboration developed among European companies. During the 1990s, IC production in Europe increased dramatically.

Applications

MEDEA has established an aggressive roadmap to match the best worldwide competition. It has evaluated projects in each of six fields considered to be strategically vital to Europe, with particular interest in three: multimedia, communications and automobile/traffic applications. The other three fields - design techniques and libraries, CMOS-based technologies and manufacturing technologies - involve the whole range of microelectronics production skills from the initial concepts to cost-effective mass production.

While European-owned companies now produce only 10% of the world semiconductor output, Europe consumes 20% of world semiconductor products. Some 52% of the wafer fabs being constructed in Europe will be non-European owned. MEDEA hopes to achieve a better balance by exploiting the established infrastructure for multinational, multidisciplinary collaboration from earlier programs, while achieving technical leadership in fields such as the most advanced system-on-a-chip applications.

MEDEA projects are funded by industrial partners and public authorities. They are chosen for their strategic importance to European industry, the R&D skills of the project partners, the probability of successful implementation, their market relevance and the expected effects on employment. Projects now in place address a wide range of current and emerging applications, from cellular telephones and smart cards to in-car entertainment systems and portable multimedia terminals. Horst Nasko, chairman of MEDEA, noted that the success in these areas depends on the development and deployment of the most advanced system-on-a-chip technologies, with close cooperation between the equipment makers and their semiconductor suppliers. A few non-European companies are collaborating with European MEDEA partners.

SMIF pods are installed at the Siemens facility in North Tyneside, UK. (Source: Siemens)

MEDEA's four-year program has attracted only about 50% of its forecast $2.5 billion, 2000 man-year budget. The Netherlands, France, Italy, Germany and Belgium account for 97% of the projects, with the 10 other members of the European Union only 3%. The first four of these countries contain the three largest European manufacturers: Philips Semiconductors, SGS-Thomson and Siemens. European fab capacity over a five-year period, shown in Figure 1, is expected to increase significantly.

In January 1996, European import duty was cut from 14% to a maximum of 7% two years ahead of schedule, followed by a further reduction to 3.5% in July 1997. The abolition of duty by January 1999 is a pre-condition for the European Electronic Components Association in joining the World Semiconductor Council. This, however, may remove an incentive to construct European fabs.

1. The 1996 and forecast 2001 wafer capacity of European countries indicate sizable increases in the next few years. (Source: Future Horizons)

Major players

Philips Semiconductors (Eindhoven, the Netherlands) moved to 200 mm in 1996 at its Nijmegen fab in the Netherlands, the largest semiconductor facility in Europe. Currently, it is building a $200 million test and assembly plant at Calamba in the Philippines.

IC process development will focus on new technologies that allow efficient and low-cost systems-on-a-chip integration, noted Aart van Gorkum, process technology manager at Philips. To carry this out, Philips is developing advanced CMOS processes and options such as the 0.5 µm one-time-programmable memory and other embedded memory processes. Additional examples include QUBIC BiCMOS processes, used for the integration of mobile communications systems, and BiCMOS line in which one-chip television is fabricated.

Philips has enhanced its bipolar technology with a "double-poly" technique to produce monolithic microwave ICs (MMIC). Launched last year for the fabrication of silicon transistors with transition frequencies of more than 23 GHz, this technology is now used to form not only transistors, but also inductance loops, capacitors and resistors on-chip. With this technology, the number of components in the front-end circuit of mobile phones can be reduced by 80%, from 30 to about six.

In December, Philips Research announced a novel "silicon-on-anything" technology that is said to bring button-sized and wrist-watch communicators much closer to reality. Based on a unique bipolar process, the new technique allows circuits to be transferred onto a range of insulating substrates, such as glass. Essentially, a fully processed SOI wafer is glued top-down to the new substrate, and the original silicon is ground and etched away to the buried oxide layer.

The use of such insulating substrates, instead of silicon, reduces parasitic capacitance and allows high-quality passive components, such as spiral inductors, to be integrated onto a chip. This enables miniature RF devices to be produced with a power consumption up to 20 times less than that of other state-of-the-art devices, such as transistors that consume 10 µA and give 20 dB gain at 2.4 GHz. The yield of more than 90% leads to low costs. Wafers up to 200 mm have been transferred to a substrate; for 150 mm, it is now routine.

New flexible plastic circuits developed by Philips Research will be able to operate even if folded in half. This is the first use of polymers to form both the conductive and insulating parts of a transistor. Applications are anticipated in contactless readable bar-code labels. A polyimide foil is used as the substrate with a conducting polyaniline layer containing a photo-initiator. When the layer is exposed to masked DUV radiation, a pattern of interconnects and electrodes is formed as the exposed polyaniline is converted from a conductor into an insulator. Philips is also working on the plastic displays developed by Cambridge Display Technology.

DRAMs

Siemens is the only European DRAM producer. Apart from its plants in Dresden, Germany, and Newcastle, UK (Fig. 2), it also has fabs in Hsinchu City, Taiwan (a ProMOS joint venture with Mosel Vitelic) and at White Oak, Va. (a joint venture with Motorola). Together they could supply more than 30 million 64Mb DRAMs per year, some 7% of the market. Hans-Peter Bette, vice president of memories at Siemens, said its goal is to have the four fabs running 0.25 µm (250 nm) processes by the second half of this year.

2. Automation equipment from Jenoptik Infab is installed at the Siemens facility in Newcastle, UK. (Source: Siemens)

Falling DRAM prices have not deterred Siemens. Dresden produced its first 0.25 µm 64Mb DRAMs in November, each requiring about a third of the area of a 0.35 µm (350 nm) device. Like all Siemens DRAMs, it uses trench cell technology and operates at 3.3 V. A 300 mm pilot line with 0.18 µm (180 nm) processing is planned for Dresden in 1999 to achieve the cost advantage of smaller die on larger wafers. Production of 256Mb 0.25 µm DRAMs is expected by the year 2000.

SMIF technology

Groundbreaking at the Newcastle fab to full process qualification took only 21 months, four months ahead of schedule, resulting in valuable cost savings. There are no plans to expand at Newcastle while the DRAM market is low. Adolf Scheibe, managing director of Siemens Microelectronics, said a major factor in the rapid ramp-up was the use of minienvironment-based automation, the first use of this technology at any Siemens fab in the world. The facility employs standard mechanical interface (SMIF) based technology from Jenoptik Infab (Jena, Germany) and highly advanced lot tracking capabilities. Wafers are conveyed from one processing step to another in vacuum-sealed, front-open-ing unified pods, never coming into contact with the cleanroom environment. The wafers are so well protected that wafer processing began while new equipment and facilities were still being installed around the process tools.

Scheibe said the use of SMIF automation also raised productivity because of improved yield and space utilization. The wafers looked clean from the beginning, and the fab already has achieved "best wafer" yields of 96% and "best lot" yields of 91%. According to Scheibe, they are confident of achieving 99% yields over time. The Infab configuration, which moves wafers in SMIF pods on tracks high above the fab floor, helped to double the productivity of Siemens' 4000 m² cleanroom.

New fab construction

SGS-Thomson plans to construct one new fab per year. For its latest expansion in Rousset, France, it has also selected Jenoptik Infab SMIF and minienvironment wafer fabrication equipment. The Rousset facility is scheduled for full production of 0.35 µm and smaller features on 200 mm wafers by the end of 1999. Jenoptik expects the present 35% of new fabs using minienvironments to increase to 70-75% by 2005.

The alliance between SOITEC (Grenoble, France) and Japan's Shin-Etsu Handotai has resulted in the production of 300 mm SOI wafers. This is considered to be a major step for ULSI applications below 0.25 µm to achieve better performance in low-power and low-voltage applications and an easier system-on-a-chip approach.

Research and development

The Inter-University Microelectronics Centre (IMEC, Leuven, Belgium) is Europe's largest independent center of excellence for microelectronics research with a staff of about 750 and some 13 spin-off companies (Fig. 3). IMEC is strongly supported by the Flemish government and is expanding, with additional facilities becoming available in 1999. It is to initiate a large venture capital fund, specializing in information technology. A Flanders government decision in July makes several million dollars available to attract two additional IC fabs.

At the IMEC Annual Research Review Meeting in November, President Professor Roger Van Overstraeten said the technological revolution has progressed much faster than the Roadmap predicted in 1994 (Table 1). The industry is already at 0.25 µm, and by 1999 CMOS could reach geometry sizes of 0.15 µm (150 nm) using the extended UV lithography under development at IMEC. No absolute roadblocks are expected for the next 15 years in physics, technology or economically. The production yield has proved to be independent of the technology generation and hence of device complexity, he added.

Van Overstraeten said top issues are lithography and interconnects, followed by environmental issues. IMEC is working closely with Carl Zeiss (Jena and Oberkochen, Germany) to develop optical systems for use with argon fluoride 193 nm UV laser radiation for the production of first 0.18 µm and then 0.15 µm and 0.13 µm (130 nm) feature sizes. IMEC believes optical lithography can be used to produce features down to at least 100 nm if enhancement techniques, such as phase-shift masking and optical proximity control, are fully exploited. Calcium fluoride lenses are being developed, as this material is more transparent than quartz at this wavelength. However, this soft material is difficult to polish during lens production. The primary advantage of calcium fluoride is good achromaticity. Currently, there is a shortage of large uniform crystals of this material.

A collaboration between IMEC and ASML (Veldhoven, the Netherlands) aims to develop 193 nm process technology, with a significant R&D effort to be launched this year (Fig. 4). This project is expected to raise 193 nm technology up to a maturity level ready for production. A multidisciplinary research team will collaborate with a worldwide network of actively participating partners. It is hoped to share the $20 million development costs among 15 partners. This project will include IC manufacturers, equipment suppliers, mask-makers and suppliers of photoresists and other materials. Luc Van den hove, director of the advanced semiconductor processing division at IMEC, said partners are already signing to join the project.

The project will be using 200 mm wafers and will be centered at IMEC. It will use a 193 nm, $15 million exposure tool and be integrated into a fully equipped lithography cell. Although attached to the IMEC pilot line, it will be made easily accessible to external users. The program includes resist evaluations with both dry and wet developable resists, detailed stepper assessments with imaging studies, overlay studies, process optimization for 0.18 µm, 0.15 µm and 0.13 µm features, plus optical enhancement techniques.

Below 100 nm

IMEC has a new sub-100 nm silicon device technology and physics program under way that will include the study of some quantum mechanical aspects of these devices. IMEC fabricated sub-100 nm transistor structures in 1996. Van den hove said he believes optical lithography can be used down to 100 nm and that X-ray lithography may have a limited application.

ASML is collaborating with Ionen Mikrofabrikations Systeme GmbH (IMS, Vienna, Austria) on an ion projection lithography technique developed by IMS. In a MEDEA project involving Siemens (Munich, Germany), Leica (Jena, Germany) and the Institute of Microelectronics (StuttFgart, Germany), it plans to develop a 100 nm prototype stepper using this technique for 300 mm wafers by the end of next year. This will employ a broad beam of hydrogen or helium ions of about 150 keV. The ions will be projected through a stencil mask to develop a photoresist on the surface of a die.

IMEC is carrying out pioneering work on on-chip optical interconnects, as well as developing copper and other interconnects. Van Overstraeten foresees that more packaging will be relocated to the sites where the ICs are produced.

SiGe

Many European companies are working on SiGe, mainly because of a strong phone market. Matty Caymax, in charge of silicon and SiGe epitaxy at IMEC, commented that commercially available CVD epitaxial reactors are now operational in a number of European facilities. This makes it possible to transfer SiGe technology from research into production for specialized applications. Included is the Temic (Daimler-Benz) work on SiGe-based bipolar products for mobile communications applications.

Philips Research is using SiGe for HBT in BiCMOS to further enhance high-frequency transistor performance combined with improved noise figures. Philips and CNET (France Telecom) have developed a process for making poly-SiGe for use as a midgap gate material in 0.18 µm CMOS technology. This is compatible with standard CMOS processing.