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Nonuniformity of Copper Electroplating Studied

 Plating uniformity could be a problem for larger wafers.

Peter Singer, Editor-in-Chief -- Semiconductor International, 6/1/1998

As the semiconductor industry readies itself for the move from aluminum to copper for on-chip interconnects (see cover story, this issue), a variety of new issues relating to copper electroplating must be addressed. Potential problems with copper electroplating -- which could be in volume production at Motorola later this year and IBM sometime next year -- include nonuniformities across the wafer and from wafer-to-wafer, as well as micro-nonuniformities that could lead to gap-filling problems and voids. Across-the-wafer nonuniformities can lead to problems with the subsequent chemical-mechanical polishing (CMP) step. Voids, aside from problems associated with the trapping of electroplating solution, will increase the resistance of the interconnect.

Jacob Jorne, chief scientist at a start-up called Cupricon (Rochester, N.Y.), has shown that across-the-wafer nonuniformities are linked to both the resistance of the copper seed layer and the resistance of the electrolyte solution. As shown in Figure 1, the electroplating process re-lies on currents passed through this seed layer to attract copper ions from the electrolyte solution. But the resistance of the thin copper seed layer is often such that the current is weaker in the center of the wafer compared to the edges. This means the edges tend to plate faster than the center. "According to my analysis, nonuniformity over the entire wafer is due to the resistance of the seed layer, especially at the beginning of the plating," Jorne told Semiconductor International. "If you feed the current from the edges of the wafers, the current has to travel all the way to the center in order to get uniform distribution. So if the resistance of the seed layer is very high, then you have more deposition at the edges than in the center."

06WP1A

Fig. 1. The copper electroplating process relies on currents in the copper seed layer to attract copper ions from the copper sulfate solution. It is possible to reverse the current between the anode and cathode to remove copper from heavily plated areas.

In a paper to be presented later this month at the VLSI Multilevel Interconnect Conference (VMIC), to be held June 16-18 at the Santa Clara Marriott Hotel, Jorne (who is also a professor of electrochemistry at the University of Rochester) plans to describe how uniformity depends on the ratio between the electronic resistance of the thin copper layer and the ionic resistance of the electrolyte plus the electrochemical reaction. This is shown in Figure 2.

Jorne said he expects issues with nonuniformities to worsen as wafer sizes increase. "The problem is going to be most severe for larger wafers: 300 mm is going to be quite a severe problem."

There are several ways to optimize the electroplating process to minimize nonuniformity problems, Jorne said. These include the optimizing geometry of the plating "cell" -- the distance between the anode and the cathode -- and the thickness of the seed layer. The geometry of the anode is also important.

Also, Jorne recommended reverse plating, where the current is reversed to remove copper. "The copper will dissolve during this period exactly where it was heavily plated."

Additives, often called levelers, brighteners or surfactants, are commonly added to the copper sulfate bath. These are usually organic materials that adsorb onto the plating surface and act to slow the plating process. However, Jorne said this process is not well understood. "We need to better understand the role of additives and how to control and maintain their level during the plating process to keep uniformity the same from wafer to wafer," he said. "You can just follow recipes, but at some point we really must understand what is happening. Otherwise, whenever you have a problem, people cannot predict what to do.'"

06WP2A

Fig. 2. Spatial uniformity is dependent on the uniformity parameter B, which is the ratio between the electronic resistance of the thin copper seed layer and the resistance of the electrolyte plus the electrochemical reaction.

At the micro level, where the main concern is void-free filling of narrow, high-aspect ratio trenches and holes, the two most important factors are what Jorne calls activation potential and diffusion. These, in turn, depend on the distribution of currents at the micro level and the transport of ions to the wafer surface. Jorne reported that it is helpful to have the flow of the electrolyte solution directly impinging on the wafer surface. "It is desirable that the electrolyte be pumped toward the wafer in a stagnation flow or a rotating disk flow pattern," Jorne said. Jorne can be reached at (716) 473-6322 or by e-mail at cupricon@aol.com.

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