CMP Market Heats Up

Table 1. CMP Market Share Leaders IPEC $126 million Ebase Technologies $64 million SpeedFam Corp. $54 million Strasbaugh $44 million (Source: Dataquest) Although Teres is the first fully LPT implemented entry into the field, other leaders in -- Semiconductor International, 6/1/1998

The numbers are still being crunched, but the total CMP market for 1996 is estimated at $360 million, and the 1997 market at $516 million. Because CMP is a new technology that enables semiconductors to continue evolving in performance and complexity, its growth is expected to exceed the rest of wafer fab equipment by a substantial amount. A recent study, "IC Planarization by CMP," by O'Mara & Associates (Palo Alto, Calif.) reports worldwide CMP equipment markets are growing at 30% per year, as manufacturers outfit new fab lines for 0.35 µm (350 nm) and 0.25 µm (250 nm) manufacturing.

CMP technology is in an intense growth period as advances in planarization of SiO₂ insulator layers, tungsten metal films, polysilicon and silicon nitride evolve, and new applications of CMP such as shallow-trench isolation (STI), polishing of interconnect metals such as aluminum and copper, and other applications begin coming on-line. Dual damascene interconnect structures are expected to require completely new planarization strategies.

Since its start in 1991, the CMP market has grown by leaps and bounds. As is the case with all emerging technologies, CMP's growth has experienced highs and spikes because it reflects the initial R&D investment, followed by a quiet period, and then by a ramp-up as production begins. As market penetration proceeds, growth rate is expected to continue dropping until it approaches the average for all wafer fab equipment.

Evolving CMP requirements are fueling a search for production solutions. In current IMD and ILD applications, low removal rates and poor planarity result in long process times. It now appears that traditional CMP approaches may prove inadequate for advanced STI and copper damascene applications because of pattern density sensitivity, dishing/erosion and high-defect problems.

The latest entry into the fiercely competitive CMP market comes from Lam Research Corp. (Fremont, Calif.). Its Teres system uses Linear Planarization Technology (LPT), which Lam obtained when it acquired OnTrak Systems. LPT uses a linear, belt-driven polish pad operating at higher pad speeds and lower polish pressure than conventional rotary systems. Lam's results indicate that the higher speed can attain removal rates of more than 4000 Å/min, while the lower polish pressure permits high planarization levels. According to the company, Teres solves the problems of conventional polishing techniques, while providing a 3:1 planarization efficiency advantage. Because the system does not need to remove as much oxide as other methods, not as much oxide has to be laid down, with resulting savings in prior steps.

The dry-in/dry-out CMP system, integrates two LPT polish stations for primary material removal and planarization, a rotary buff station for surface modification/defect removal and an integrated post-CMP cleaner, all in a 72 ft² footprint. It promises a throughput of more than 50 wafers per hour for standard 0.25 µm devices, and provides a threefold sensitivity reduction to pattern structures and density over conventional polishing systems. Lam expects its technology to overcome current limited results on critical CMP steps, including shallow-trench isolation and copper damascene applications.

Although Teres is the first fully LPT implemented entry into the field, other leaders in the field (Table 1) are considering or working on linear polishing technology architectures. Rahul Jairath, Lam's director of CMP technology, anticipates the company will gain, and keep, a considerable share of the CMP market. "We do not expect serious competition as far as LPT technology is concerned -- our experience in this field is fairly unique, as is our service capability. Because of this, we have a very aggressive and clear patent portfolio, some already issued and others pending." According to Jairath, a reason behind Lam's patenting philosophy for its new system is that, traditionally, the status of CMP industry patents has been confusing.

Ronald Dornseif, a principal analyst with Dataquest (San Jose, Calif.), views Lam's entry into the CMP market as strategically sound. "Because CMP, rather than metal etch, is used in dual damascene metal patterning, the etch business will be hard-hit by CMP's adoption, which will be increasingly fueled by the move to dual damascene." Dornseif added that by entering the CMP arena, Lam protects its future.

Industry observers have pointed out that, although promising, linear technology has yet to prove itself. Dornseif agrees with this view. "It remains to be seen how the product will perform and how the end users will accept it. Lam Research is a late entry into a 14-company field. They're going to be playing in a very competitive market segment, albeit one of great growth and opportunity."

Recently, Lam announced a restructuring that included a 14% reduction in its global workforce, citing lower prospects for orders and revenue because of the Asian financial crisis. The company plans to put more focus on its core etch and CMP product groups and reduce its flat panel display and thermal CVD operations. Manufacturing operations will be downsized and consolidated. As a result of the organizational changes, ~700 employees at locations throughout the company's international operations will be affected.