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Replacing C-V Monitoring With Noncontact COS Charge Analysis

The corona-oxide-semiconductor (COS) technique provides an early warning system that flags impending problems before they reach a critical stage.

K.B. Catmull, R.G. Cosway, Motorola, Chandler, Ariz B.A. Letherer, G.S. Horner, Keithley Instruments Inc., Cleveland, Ohio -- Semiconductor International, 6/1/1998

  
 At a Glance

The effective sensitivity of poly MOSCAP C-V testing is compared with a new noncontact COS technology. While the COS technique is analogous to quasistatic C-V, COS technology is significantly more responsive than poly MOSCAP C-V to variations in oxide contamination.

Monitoring contamination levels in diffusion furnaces is necessary to ensure that a consistent environment is maintained for the production of semiconductor devices. Because of the large load sizes of diffusion furnaces, there is a potential for significant amounts of scrap if adequate contamination monitoring is not maintained. In addition, a significant amount of product remains at risk if contamination monitoring is not performed in a timely manner. Clearly, the value of monitor data is greatest immediately after a product run, and this value decreases with time.

Poly MOSCAP process vs. in-line

Electrical testing is often used after thermal oxidation as a means of detecting oxide contaminants introduced or activated during processing. However, it is important to recognize the degree and type of processing prior to test that will influence the type of information received. For instance, the sample preparation necessary to get poly MOS-CAP wafers ready for capacitance-voltage (C-V) testing results in a significant exposure of the test structure to high temperatures. This process mimics the thermal exposure to full-flow devices, so the C-V electrical test parameters should ostensibly detect oxide problems that will ultimately result in end-of-line test failure. However, the natural annealing and cleaning action of the process tends to mask true variations in the as-grown oxide quality. From a manufacturing viewpoint, it would be preferable to have an early warning system that flags impending problems before they have reached a critical stage. The standard C-V parameters are still desired, but without the cleaning action inherent in the poly MOSCAP deposition process. A preferred method would be an in-line technique analogous to C-V that does not require MOSCAP processing. This paper describes one of the first production implementations of such a system, based on corona-oxide-semiconductor (COS) technique. To provide a well-known reference for this work, we will concentrate on the sensitivity differences between poly MOSCAP test structures and the COS technology.

COS technology

COS is similar to quasistatic (low-frequency) C-V testing. The principal difference is that COS is a noncontact method, whereas C-V requires MOSCAP processing. As in C-V technology, COS analysis requires applying an electrical bias to the sample to measure the oxide's electrical properties. For C-V, this bias is a voltage applied to the MOSCAP through an electrical prober, and the response is the measured capacitance. With COS, the bias is applied by charging the oxide surface. The bias, in charge/area, is measured by a coulombmeter attached in series with the chuck. A typical sweep may bias the surface to create an electric field of ±1 MV/cm (the same bias range used in conventional C-V testing). The full sweep is composed of ~40 small charge depositions.

Two techniques are used to measure the response of the semiconductor after each charge deposition:

  • Surface voltage (Vs) is measured by a noncontact vibrating Kelvin probe. Vs is controlled by the capacitance of the series-connected oxide and silicon. The oxide capacitance is a constant, while the silicon capacitance has an inherent bias dependence because of the semiconducting nature of the silicon.
  • Surface photovoltage (SPV) is the temporary voltage created when free carriers are photo-injected into the near surface region of the silicon. In this case, the probe vibration used to measure Vs is turned off, and a high-speed light flash is used to photogenerate carriers. A voltage spike caused by the temporary collapse of the near surface band bending is capacitively coupled to the motionless sensor and captured by a high-speed A/D converter.

Measurement fundamentals

The building blocks described above are used in a repetitive fashion to build a COS data sweep: Deposit charge (Q), measure Vs and measure SPV. The resultant Q, Vs and SPV curves are analyzed using nonlinear curve fitting and a full quasistatic band bending analysis.1 Several oxide electrical parameters (Vfb, Dit, Tox, Qtot , etc.) are extracted during this analysis.

Mobile charge determination

In the COS technique, mobile charge is pushed and pulled across the oxide. An electric field is applied using corona charge. Heat cycles similar to conventional bias temperature stress measurements (200-250°C) are performed. The Vs drop that occurs during a heat cycle is directly proportional to the amount of mobile charge in the oxide.

05CAT1A
Fig. 1. Comparison of mobile charge detection following photoresist/ash processing.
05CAT2A
Fig. 2. Comparison of flatband voltage following photoresist/ash processing.
05CAT3A
Fig. 3. Comparison of flatband voltage for samples cooled in O2 after oxidation and subsequent measurement after a forming gas anneal.
05CAT4A
Fig. 4. Comparison of interface trap density for samples cooled in O2. A forming gas anneal significantly reduced Dit.
05CAT5A
Fig. 5. SPV-Vs showing stretch out that is due to high Dit.
05CAT6A
Fig. 6. Comparison of mobile charge detection before and after HCl clean.

Experimental

In an attempt to correlate C-V measurements to COS analysis, samples with differing levels of Qm, Vfb and Dit were produced. All samples had 500 Å thermal oxides grown at 1050°C on p-type, boron doped (100) silicon substrates. The following methods were employed to change the characteristics of the thermal oxide intentionally:

Photoresist was applied to the surface of the wafer and then ashed off to increase Qm on several wafers.

An O2 flow during the temperature ramp-down of a thermal oxidation process was used to increase the fixed oxide charge and density of interface traps. A subsequent forming gas anneal was used to passivate the Si/SiO2 interface.

An HCl treatment at elevated temperature was used to remove mobile charge from the surface of the wafers.

The Vfb, Dit and Qm of the wafers were measured with the Keithley Quantox process monitoring system, which is based on COS technology. Pairs of wafers were measured to verify repeatability. Measurements were made with the Quantox system both before and after exposure to contamination. Split lot experiments were carried out with C-V testing, while control wafers were measured with both techniques.

Results

Photoresist ashing: Measurements made with the Quantox system before and after the resist-and-ash and ash-only processes indicate a significant increase in the amount of Qm, as shown in Figure 1, as well as a change in the Vfb, shown in Figure 2. The data indicate the resist-and-ash and ash-only processes deposit significant amounts of mobile charge on the wafer. Assuming a 1 µm thick photoresist deposition, the level of mobile charge is ~0.3 ppb, if it is attributed solely to contamination of the photoresist. A small amount of interface damage, presumably because of the plasma ash, was also detected as a shift in Vfb. The companion data from C-V measurements did not show a significant change in either of the parameters, indicating a lower sensitivity to this type of contamination and damage.

Oxygen ramp-down: C-V measurements of the samples cooled in an O2 environment exhibited inconsistent response to a forming gas anneal, as shown in Figure 3. One sample showed an increase in Vfb, while a second sample showed a decrease. D it results, however, were as expected -- the forming gas anneal lowered the density of interface traps. The Quantox system's results, illustrated in Figures 3 and 4, show a significant improvement in V fb and Dit after the forming gas anneal.

Figure 5 shows the raw data acquired during the Quantox system measurement sweeps used to generate Figures 3 and 4. The pre-anneal measurements, which display high Dit, exhibit stretch-out of the SPV-Vs curve, similar to that encountered in conventional C-V. The stretch-out is reduced significantly by the 400°C forming gas anneal as a result of the reduction in Dit. However, Dit and Vfb did not return to the level of the control wafers.

The low sensitivity of poly MOSCAP C-V shown here apparently is due to the processing sequence, rather than a fundamental sensitivity issue for C-V. The poly MOSCAP process contains two high-temperature post-oxidation steps (dopant activation/drive and a final forming gas anneal) that might significantly reduce the as-grown Dit and fixed charge.

HCl cleaning effects: The Qm values reported by poly MOSCAP C-V testing and the Quantox system differ by nearly two orders of magnitude. The poly MOSCAP process flow was investigated with the Quantox system to determine which processing steps were primarily responsible for removal or gettering of mobile charge. As might be expected, the HCl pre-clean used immediately prior to poly deposition is one of the primary causes of the reduction in mobile charge. As shown in Figure 6, Quantox system measurements show Qm drops by ~50% when the HCl pre-clean is performed. Further reductions in mobile charge may be attributed to the gettering effects of the polysilicon, either at grain boundaries or in the bulk, because of heavy phosphorous doping.

Conclusion

The effective sensitivity of poly MOSCAP C-V testing has been compared with a new noncontact COS technology. While the COS technique is analogous to quasistatic C-V, it has been shown the COS technology is significantly more responsive than poly MOSCAP C-V to variations in oxide contamination. The differences in sensitivity are ascribed to the significant annealing and gettering mechanisms activated during poly MOSCAP processing, and split lot experiments support this hypothesis.

References

1. E.H. Nicollian and J.R. Brews, MOS Physics and Technology, (John Wiley and Sons, New York, 1982), p. 77.

2. M.-S. Fung and R.L. Verkuil, A Contactless Alternative to MOS Charge Measurements by Means of a Corona-Oxide-Semiconductor (COS) Technique, (Spring Electrochemical Meeting, abstract No. 169, 1988).

05CAT7 Kelvin B. Catmull received his BSE degree in chemical engineering from Arizona State University in 1996. He is currently a process engineer at Motorola's MOS12 in Chandler, Ariz.
Phone: (602) 814-3512
Fax: (602) 814-3519
E-mail: rp4683@email.sps.mot.com
05CAT8 Richard G. Cosway is a member of the technical staff at Motorola's MOS12 in Chandler, Ariz. He has a BSE in chemical engineering from Arizona State University and an SM in chemical engineering from the Massachusetts Institute
of Technology.
Phone: (602) 814-3514
Fax: (602) 814-3519
E-mail: rsdk90@email.sps.mot.com
05CAT9 Brian A. Letherer is an applications engineer for Keithley Instruments. He has a bachelor's degree from the University of New Mexico and has 12 years of experience in the semiconductor field.
Phone: (888) 587-7641
E-mail: Letherer_Brian@Keithley.com
  Greg Horner has a bachelor's degree from Colgate University and a doctorate in electrical engineering from the University of Colorado at Boulder. He develops new applications for noncontact electrical characterization of semiconductors at Keithley Instruments.
Phone: (408) 986-8411
Fax: (408) 970-0610
E-mail: Horner_Greg@Keithley.com

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