Design and Validation of 0.25 µm Integrated Circuit Yield Model
The new yield model uses manufacturing data to produce tool targets.
Fred Lakhani,SEMATECH, Austin, Texas Fred Lakhani,SEMATECH, Austin, Texas Daren L. Dance, Wright Williams & Kelly, Austin, Texas Randy Williams,Intel Corp., Albuquerque, N.M. -- Semiconductor International, 6/1/1998
Yield estimates are dependent on the modeling method and the yield model assumptions. In addition to defect-limited yield, probe yield is also impacted by wafer breakage, misprocessing and parametric distributions. This model assumes that these are included in the systematic or gross yield estimate, which is assumed to be 90%. The product of gross yield and RDLY results in the functional or die sort yield. Table 1 summarizes the major yield modeling assumptions.
Each type of measurement input can be used to forecast different types of estimates under the model assumptions. E-test input can be used to produce targets for E-test, PIDs and PWP. PID and PWP input cannot be used to produce E-test targets, but either one can produce either PID or PWP targets (Table 2).
Since different member companies use significantly different electrical testing strategies, no E-test targets were estimated. The validation focused on PWP and PID targets with primary emphasis on PWP tool targets.
The defect yield calculations used in this model are based on the negative binomial model. The clustering parameter can be used to fit the negative binomial to several common yield distributions (Table 3).
|
Table 1. Yield Model Assumptions for 0.25 µm Technology |
|
| Target process | 0.25 µm logic |
| Cluster parameter | a = 2 |
| Critical area | Estimated from fault probability Pf 1 |
| Die area | 3 cm2 |
| Inspection sensitivity |
Per NTRS
(Roadmap): Bare wafer = 0.08 µm Patterned wafer FEOL = 0.15 µm Patterned wafer BEOL = 0.30 µm |
| Model type | Negative binomial |
| Transfer coefficient | Assumed = 1 |
| Target yield | RDLY = 90% |
| Defect size distribution | 1/X3 |
| Scaling | Horizontal and vertical |
Validation method
The validated targets were derived from actual PWP, PID and E-test measurements provided by participating SEMATECH member companies and from SEMATECH project information. To address confidentiality concerns and because of differences in tool sets, base processes and measurement methods, the member company input was normalized to a 90% yield basis at a minimum defect size sensitivity of 0.08 µm (80 nm) per the NTRS. These normalized data sets were then mapped to the SEMATECH 0.25 µm process prior to analysis. Steps in the validation process are described in detail below:
- Collect member company data -- Particle-related data sets were provided from three member companies, an equipment supplier and SEMATECH equipment projects. These data included PWP measurements, PID measurements and particle-related electrical test yields. Not all sources provided all types of data.
-
Map to SEMATECH tool list -- The SEMATECH 0.25 µm process
documentation refers to process and inspection tools in generic,
functional terms. The member company tools were described using
supplier and model designation. Thus, the member company base process
tool list was mapped to the SEMATECH tool list. Not all member company
tools are represented on the SEMATECH tool list, and not all SEMATECH
tools were included in each member company process. The mapping
process is a potential source of target variance.
Table 2.
Types of Tool TargetsInput E-test target PID target PWP target E-test Yes Yes Yes PID - Yes Yes PWP - Yes Yes -
Model member company yield estimate -- A separate yield estimate was
modeled for each type of member company input data using the negative
binomial equation and multiplying the yields for each process step,
tool or zone:
where
Y = defect-limited yield,
A = critical area,
D = defect density and
a = clustering parameter - Map to the SEMATECH 0.25 µm process -- All member company tool data were scaled to a uniform particle sensitivity of 0.08 µm and applied to the SEMATECH 0.25 µm process using the mapping identified in Step 2. Upper and lower confidence intervals were also estimated for each tool fault density estimate from each type of data using a 90% confidence interval.
- Scale to 90% yield -- The scaled data estimates were used to estimate the yield of the member company data on the SEMATECH process. In each case, the tool fault density estimate and confidence interval were corrected to achieve the target yield by determining the ratio of the sum of the tool faults to the theoretical fault density at 90% yield for the process.
- Compare all scaled member company estimates -- Since several member companies provided data, this process provided multiple, scaled estimates of PWP and PID levels for each tool.
-
Eliminate outliers and check data sufficiency -- The outliers were
detected by estimating the variance of all tool estimates. Since the
tool estimates represent a non-normal distribution, the variance was
estimated by subtracting the 75th percentile value from the 25th
percentile value. Two times the variance estimate was added to the
75th percentile and subtracted from the 25th percentile to estimate
the bounds of useful data.
Table 3.
Yield Distribution ConversionsYield distribution Negative binomial cluster parameter
( a)Seed's 1 Murphy 4-7 Poisson 10+ - Determine 50th percentile of validated tool estimates -- The 50th percentile of the accepted estimates provided the initial target for each tool. Initial targets were calculated for tools that had at least three estimates from two different sources. Targets were not calculated for the remaining tools.
- Renormalize to 90% yield -- The 50th percentile of the tool estimates provides an aggressive target because it assumes that all process steps have device dimensions at the minimum ground rules. Outliers that would further depress yield estimates have been removed from the population of estimates. If the 50th percentiles were substituted back into the yield model, the resulting estimate would be greater than the 90% yield model target. The 50th percentile targets were then rescaled to values that result in a 90% yield estimate for the SEMATECH 0.25 µm process.
| Table 4. Estimating PWP from PID | |||||
| Zone | Zone PID | Tool A | Tool B | Tool C | Tool D |
| 1 | 180 | 60 | Not used | 60 | 60 |
| 2 | 360 | 120 | 120 | Not used | 120 |
| 3 | 210 | Not used | 70 | 70 | 70 |
| Total PID | -- | 180 | 190 | 130 | 250 |
| Steps | -- | 2 | 2 | 2 | 3 |
| Average PID | -- | 90 | 95 | 65 | 83.3 |
PWP estimation methods
Three sources of data were used to estimate PWP values: PWP measurements, PID estimates of PWP and E-test estimates of PWP. Each validation source provided one or more of these estimates.
PWP measurements by the data source are the most straightforward method of estimating PWP values. The validation data by tool were mapped to the SEMATECH tool set, normalized and scaled by the methods outlined above to estimate PWP from PWP data for each data source.
Estimating PWP from PID is more complex. The PID measurements focus on a process zone, not a specific tool. Moreover, each PWP defect does not translate into a PID defect and vice versa. However, to keep the model simple, the PID to PWP transfer coefficient has been assumed to be one. The yield model converts zone PID measurements to tool measurements by identifying the tools used in a process zone and allocating the PID estimates of fault density to each tool equally resulting in an estimate of PID per zone per tool. This allocated PID is averaged for tools used in more than one process zone and is then used to estimate a fault density per tool from PID estimates (Table 4).
This allocation method builds on the re-entrant nature of semiconductor processing. While we know that tools have different contributions to zone PID, we have no prior knowledge of each tool's contribution. Since many zones are similar but not identical, this allocation method uses the differences between process zone tool sets to identify relative contributions by tool assuming a PID to PWP transfer coefficient of one. In the example shown in Table 4, Tool B clearly contributes more defects than Tool C.
|
Table 5. 90% RDLY PWP Specifications for Top 10 Tools |
|||
| 0.25 µm logic/microprocessor process tool description | PWP median (/m2) (>0.08 µm particles) | Max error at 90% confidence level | Number of particles (>0.2 µm) per 200 mm wafer |
| Sputter, Ti-Al-Cu/TiN | 776 | 39% | 3.7 |
| Oxide etch/zero etch or S/D screen etch | 648 | 26% | 3.1 |
| S/D anneal 1 | 594 | 30% | 2.9 |
| Post-metal sidewall removal | 496 | 118% | 2.4 |
| Med-I implant | 460 | 35% | 2.2 |
| Metal etch (w/arc etch & ash) | 452 | 32% | 2.2 |
| Planarization, ILD | 421 | 57% | 2.0 |
| Vapor phase clean | 417 | 245% | 2.0 |
| CDE etch, nitride strip | 411 | 87% | 2.0 |
| ILD SiO2 @ gap fill | 370 | 51% | 1.8 |
E-test yields are similar to PID measurements since these measurements focus on a zone or group of zones. The yield model uses the same method for estimating PWP targets from the E-test as for estimating PWP from PID. Only E-test yields from particle defect related test structures are used. Even these yields can be impacted by other systematic problems. For this reason, E-test yields are less useful in estimating PWP targets.
PWP specifications
The base process input is confidential and not reported here. The 50th percentile of the validation data predicted a yield estimate of 92.1% yield for the SEMATECH 0.25 µm process. These were rescaled by determining a ratio of the sum of the theoretical fault density at 92.1% yield to the theoretical fault density at 90% yield for the process.
Previous targets were used for tools with insufficient validation data. These targets were not rescaled. The maximum error of estimation was calculated for 90% confidence levels using the median coefficient of variation of the raw PWP data for each tool. Table 5 shows the PWP specifications for >0.08 µm particles and the maximum error estimate for the top 10 tools in order of defectivity contribution per single process step. Moreover, 1/X3 defect size distribution is assumed to estimate an equivalent target for 0.2 µm (200 nm) particles per 200 mm wafer for 90% RDLY.
Conclusion
Significant effort has been made to derive credible tool targets for the tool set for the SEMATECH 0.25 µm logic process. Besides using real manufacturing data from 0.30 µm to 0.50 µm process technologies from three SEMATECH member companies, tool development experts at SEMATECH have been consulted for feedback on the PWP targets based on their exposure to 0.25 µm tool projects. The feedback has been mostly positive.
Because of the unavailability of confidential data and the differences of process flows and tool sets between fabs, the tool targets derived from the new model have a sizable error of estimation (2% to 245%; project goal: <300%). Assigning higher weight to PWP estimates from PWP measurements would likely result in less error.
The most significant improvement in this model is the use of validation data to drive the tool targets for the 0.25 µm tool set. Going forward, the following improvements should be considered to reduce the error of estimation:
- Electrical to process data mapping to obtain kill ratios
- Use of process zone pareto to drive yield improvement
- Use critical area extraction software for each mask level instead of using minimum geometries for the full chip area
- Acquire data at several points along the yield curve to see the effect of clustering with improving yields
- Verification of 1/X3 defect size distribution
Future work is needed to extend the model to 0.18 µm (180 nm) technology and beyond. Also, continuous validation and optimization of the model on an ongoing basis with available benchmark data will ensure the long-term usability of the model.
References
1. National Technology Roadmap for Semiconductors, Semiconductor Industry Association, 1994.
3. SEMI E35, Semiconductor Equipment and Materials International, 1995.
|
Fred Lakhani is pro ject manager in the
Contamination Free Manufacturing organization at SEMATECH. He leads
programs in SEM/EDS based ADC, yield modeling and spatial signature
analysis. He has held several engineering and management positions
with primary emphasis in device engineering and yield management. Phone: (512) 356-7011 Fax: (512) 356-7640 E-mail: fred.lakhani@sematech.org |
|
Daren L. Dance is manager of applications research
and development for Wright Williams & Kelly. He is co-chair of the
SEMI Metrics Cost-of-Ownership subcommittee and is the yield model
and defect budget team leader for the National Technology Roadmap
for Semiconductors. Phone: (512) 349-4950 Fax: (512) 349-4951 E-mail: dldatwwk@aol.com |
|
Randy Williams is the defect reduction manager at
Intel. He is responsible for defect metrology, defect reduction,
microcontamination and yield modeling activities. Before joining
Intel in 1996, he held positions at SEMATECH and IBM. Phone: (408) 765-6832 Fax: (408) 765-0049 E-mail: randy_r_fab9_williams@ccm.sc.intel.com |
