Proven Methodologies for Accelerating Yield
Systematic yield problems can result from design problems that were not adequately addressed in the development stage.
Laura Peters, Senior Editor -- Semiconductor International, 7/1/1998
Laura Peters Senior Editor
Editorial Comment
Though yield on some chips is 90% or higher, it is a mistake to think that the majority of fabs produce chips with such high yields on a regular basis. In fact, the SIA Roadmap has essentially been a source of misinformation in this area. The SEMATECH productivity curve shows that industry productivity -- traditionally relying on shrinking feature size, yield improvements, wafer size transitions and other productivity improvements -- must increasingly rely on higher tool efficiency, because the effects in other areas, such as yield improvement, have diminished. While it is true that increasing the throughput of wafer processing tools will dramatically increase fab productivity, it is false to say that the impacts of yield improvement are going away because fabs enjoy 90% or better yields.Tracking of yield learning rates in fabs might provide a better starting point -- especially as acceleration of yield is so closely tied to time-to-market of leading-edge chips and, therefore, company profitability. For instance, successful semiconductor companies typically generate a much greater portion of their revenues and profits from new products than from existing chips. One need only look to the success of Intel to understand the revenue impact associated with bringing the faster, higher functionality chips to market faster than the competition. AMD, unfortunately, has provided a good example of the economic blows bestowed to companies who fail to accelerate yields when needed.
Certainly, the fab's yield learning rate, its ability to reduce baseline defect density and to control excursions, plays a crucial role in determining the success of the company. The time has come to take a closer look at this bottom-line metric.
Proven Methodologies for Accelerating Yield
Two fabs with identical toolsets have different results -- one can meet aggressive yield targets in three to six months, while the other struggles to attain that yield after a year. The difference "lies with overall methodology, the organizational efficiency, priority setting of the management team and its ability to manage to that goal," explained Tom Long, manager of the Yield Management Consulting Group for KLA-Tencor (San Jose, Calif.). Long said the right combination of metrology tools, software and operational methodologies are needed today to rapidly accelerate device yields. He explained that the combination of systematic yield problems with random-defect-related yield problems only exacerbates the problems associated with rapid yield learning.Systematic yield problems can result from design problems that may not have been adequately addressed in the development stage. "Intel is always used as an example, but it is the perhaps only company in the industry that has the luxury of having a large enough development effort to allow it to prove-out the yield in development to the levels it expects in manufacturing," Long said. He pointed out that the number of defects found at higher sensitivity (a direct result of shrinking design rules) also goes up exponentially.
Fortunately, the tools and methodologies needed to identify, classify and address increasing levels of defectivity are maturing quickly, too. The technology needed to manage literally terabits of information a day is now available. More importantly, the methodologies needed to separate "killer" from "nuisance" defects are now better understood. "We are taking all the information from the tools, whether the sensors are measuring defects, linewidths, overlay, resistance or stress -- analyzing for excursions and then correlating it to the electrical results at the end of line,' Long explained. He added, "You determine what level of improved control is needed to raise yield by a given amount. In the case of high-performance microprocessors, that level of control could determine whether you produce a 266 or a 400 MHz device."
Long's consulting group, consisting of 30 world-class fab yield engineers, has been able to improve yields in some fabs by 40-50% over a period of six months. He observed that fab engineers typically spend 80% of efforts determining what is going wrong, leaving only 20% of their valuable engineering talent to fix the problems. "When that ratio is reversed, they have much higher yield learning rates and have reduced cycles of learning going forward," Long described. He added, "The metrology tools must be used to extract the most valuable data for the process, the software must learn which defects are killer defects using expert-system-like software and the methodologies must be prioritized by their effectiveness in addressing a given problem." The best methodology "allows you to rapidly determine which parameters are critical and what's causing the yield problem," Long said.
From KLA-Tencor's standpoint, the yield management group has brought strategic knowledge into the company. "We not only act as a very valuable source of information on how to improve our hardware and software, but we are also learning which tools and methodologies are necessary to do the job correctly," Long said.
