Water Spots: The Scourge of Wafer Dryers
Capable of causing gate oxide defects and preventing proper adhesion of films, water spots pose a significant challenge in the drying of silicon wafers.
Laura Peters, Senior Editor -- Semiconductor International, 8/1/1998
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Water spots form when dissolved, non-volatile material (often silica) is left behind as water droplets begin to evaporate. As feature sizes shrink beyond 0.35 µm, surface tension between the liquid and the device features on the wafer increases, so water marks are created more easily. In cases where the wafers have both hydrophilic (water attracting) and hydrophobic (water resistant) surfaces, such as at pre-contact etching in the presence of field oxides, water marks are almost certain to form. The creation of this surface condition increased dramatically when the industry began use of dilute HF (DHF)-last cleaning in the early 1990s. HF etching provides hydrophobic, hydrogen-terminated surfaces on select regions of the wafer. High aspect ratio trenches also present a significant challenge to drying technology.
Steve Bay, vice president and chief technical officer of CFM Technologies (West Chester, Pa.), said water spotting can cause problems with adhesion of films, contact resistance, non-uniformity between conducting layers and gate oxide defects. In CFM's Direct Displace technique used in its Full Flow system (Fig. 1), water is drained from a single chamber at a controlled rate as IPA vapor displaces the water and dries the wafers.
Abhay Bhushan, CFO and executive vice president of YieldUP International (Mountain View, Calif.), emphasized the role that cleaning and drying play in yield improvement. "The challenge is to make flexible systems that accommodate different chemistries and allow people to get the wafers completely clean and dry without water spots, surface roughness or particles," he said. He added that concerns over tool footprint and adaptability to the customer's existing systems are also critical.
Dryer performance
| Fig. 1. The Full-Flow system used Direct Displace drying technology to eliminate watermarks, critical to the success of HF-last processing. (Source: CFM) |
IPA vapor dryers were introduced to the semiconductor industry approximately 10 years ago. Manufacturers of IPA vapor dryers claim that the high concentration of IPA results in the immediate formation of an IPA boundary layer that prevents particle deposition and water spotting.
Mehmet Delikanlioglu, sales/service engineer for Kimmon International (Fort Worth, Texas), explained how the IPA vapor dryer is characterized by its recovery time, the time needed for the vapor cloud to form and for condensation on the wafer to begin. "Recovery time is very important, because if it's longer than 25 or 30 seconds, the rinsed water naturally dries from the still soaking wafers and generates water marks," Delikanlioglu said. Kimmon has reduced this recovery time to less than 15 sec in its latest machines. Delikanlioglu contended that although many users have moved away from vapor dryers due to environmental issues, he expects they may return if performance cannot be met using alternative methods. Another possible limitation of vapor dryers is the necessary transfer time from the rinse bath to the vapor dryer, a brief interval during which water spotting can begin.
High disposal costs (though IPA itself is inexpensive) are why the industry generally moved to more dilute IPA drying methods. IPA's environmental issues arise from the fact that it is a flammable, organic solvent resulting in the emission of volatile organic compounds (VOCs). Dilute IPA dryers can require only 4-10 ml of IPA per batch of wafers. Though this quantity is small, the concentration of IPA in the rinse water is still too high and must be removed if the water is going to be recycled. And although IPA vapor drying uses much higher quantities of IPA, it is easier to reprocess, because it is not as diluted with water. Reprocessing methods use distillation, molecular sieves and vapor permeation methods.
| Fig. 2. Top-loading dryers ease automation of the drying process. (Source: Verteq) |
The Marangoni principle involves the slow withdrawal of wafers from a DI water bath to an environment of IPA and nitrogen such that only the portion of the surface that is at the interface of the liquid and vapor phases is "drying" at any one time. In this way, uncontrolled evaporative drying on the wafer is prevented. IPA drying provides a great advantage in hydrophobic cleaning steps such as pre-gate, pre-silicide and pre-contact cleans. Dilute IPA approaches are also better suited to applications where a photoresist pattern must remain in place after cleaning and drying.
"The strength of the Marangoni process is that it works identically on hydrophobic and hydrophilic surfaces," said Mark Heyns, group leader ultra clean processing group at The Interuniversity Microelectronics Center (IMEC, Leuven, Belgium). "We have not found a process yet that a Marangoni dryer cannot address," he said. Heyns said however, that trade-offs between drying speed and performance may need to be made in efforts to find a process window for drying some devices.
| Fig. 3. A dual-chamber dryer rinses wafers in DI water, transfers them to a hot N2 environment, flows N2 and IPA to dry wafers and finally purges the chamber with hot N2. (Source: TEA) |
Steag Microtech (Austin, Texas) is now beta-site testing an alternative solvent-free drying system, addressing needs for reduced chemical consumption and waste. Other ways IPA is being introduced in wafer drying is by dispersing room temperature IPA to the wafer surface (as in the Sonic Fog dryer from AIO in Fremont, Calif.) or by injecting IPA into a nitrogen carrier gas as in YieldUP's system (Fig. 4).
Throughput and cycle time issues
The challenge in developing single wafer cleaners and dryers (to follow CMP and precede RTP steps) is to reduce drying times very dramatically. The 10-15 min drying times in batch systems must be reduced to 10-15 sec to make single-wafer drying systems feasible. Semitool (Kalispell, Mont.) is using a new surface tension technique to overcome capillary and viscous drag, speeding drying times significantly relative to Marangoni processes. IMEC is getting ready to announce a fast single-wafer drying technology. "Development of a production-worthy technology for single wafer drying will open up new possibilities for process integration," Heyns said.
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| Fig. 4. IPA with nitrogen carrier injection is used in this motionless dryer that accommodates up to 100 8 in. wafers. |
"We are working on both single-wafer drying and a wafer accumulation step so as to be transparent to the other processes from a throughput standpoint and then operate either in a batch-type mode or single-wafer mode, depending on customer needs," said Steag's Kevin McLaughlin, technical support specialist.
The Marangoni effect is easily scaled to larger surfaces (and in fact, is used to dry flat panel displays up to 23326 in.). CFM's system at Semiconductor 300, the Siemens/Motorola fab in Dresden, Germany, processes 104 300 mm wafers per batch. TEA's SD2 system and spin dryers have passed testing at I300I. Verteq's spin dryers, which passed testing at I300I, are being used for everyday drying.
Conclusions
Wafer drying, a less-than-glamorous area of wafer processing, is receiving heightened attention due to its critical role in yield improvement. Spin dryers will continue to be used whenever possible, while various forms of IPA drying each address water spotting and particle issues in their own way.
Controlling Static Charge
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| Fig. A. Ionization reduces charge levels by 94%. |
Providing an electrical path for the charge to slowly drain to ground is the best way to prevent static charge-related events. In an SRD, the offending charge is on isolated and suspended wafers, so ionization of the nitrogen used for drying -- making it conductive -- is the method of choice. Studies show the conductive gas reduces static levels by 94% (Figure). Levels were measured at different positions in the SRD chamber and on wafers 1 and 12 in the cassette.
Acceptable static charge levels
SEMI Document 2637, "Guide to Assess and Control Electrostatic Discharge (ESD) and Electrostatic Attraction (ESA) in Equipment," recommends acceptable levels of static charge to avoid static problems. Recommendations depend on the static problem to be prevented. Since most equipment is required to have CE certification, ESD immunity must be demonstrated at 4000 V test levels. The SEMI Guide recommendation of 300 nanocoulombs (2000 V) should be sufficient to avoid most equipment-related ESD problems.
Contamination reduction is a more complex issue. Ambient particle level, time of exposure and static charge level interact to determine the resulting particle deposition. In a Class 1 ambient, with exposure times less than 60 sec after leaving the SRD, static levels as high as 4000 volts/cm may still be tolerable. Considering the operations that must be carried out on wafers after they leave the SRD (wafer transfer, sorting, etc.), the SEMI Guide level of 400 volts/cm (1000 volts/in.) might be more appropriate. This would allow for exposure times up to 600 sec, or higher ambient particle levels.
SRD ionization guidelines
1. Reliability & maintenance Since it is difficult to access and adjust the ionizer once inside the SRD, a self-balancing model is the best choice. Ionizers are available with maintenance intervals as long as three years.
2. Compressed gas ionizer Typical ionizer bars have exposed emitter points that are susceptible to moisture build-up from water, solvents and cleaners. Alternatively, a compressed gas ionizer delivers ionized N2 to the SRD bowl. This method also protects the wafers from exposure to high electric fields from the emitter points.
3. Cleanliness Class 1 cleanroom compatible ionizers are recommended for use inside process tools. Ionizers with single-crystal silicon points exceed Class 1 requirements and are the industry standard for ultraclean ionization in fabs. The next cleanest emitter material is titanium, which is Class 1 compatible. Tungsten emitter points meet Class 10 requirements. Since ionizers produce a small number of particles, the applicability of these metallic emitters point materials will need to be considered when used in the semiconductor manufacturing process.
4. Alarm indicators An alarm relay should be connected to the SRD control panel to indicate any ionizer malfunction.