Roadmap Identifies Packaging Requirements and Challenges
The 1997 Roadmap draws attention to flip-chip.
John Baliga, Associate Editor -- Semiconductor International, 1/1/1998
| The 1997 National Technology Roadmap for Semiconductors spells out some important requirements and challenges in the years ahead for assembly and packaging technologies. It says that assembly and packaging needs are driven as much by market application as by silicon technology, and of course, that cost will drive technology trade-offs for all market segments.
The cost per pin of assembly and packaging is expected to decrease over time, but the increase in pincounts is expected to be more rapid. This is believed to lead to an increase in assembly and packaging cost at the chip, substrate and system levels. Package design complexity will increase. An integrated design system is called for, factoring in physical, electrical, thermal, mechanical, manufacturing and cost issues. In the short term, it is expected that the focus of design tool effort will be on flip-chip substrates, migrating later to a fully integrated solution. The goal is to have such a system within the next decade, and this goal is specifically identified as one of the most difficult challenges facing assembly and packaging. Flip-chip packaging is expected to dominate the market in the upcoming years. Though some have grown accustomed to taking this prediction with a grain of salt, it now appears unavoidable. In its coverage of chip-to-next level interconnect, the Roadmap states, "To satisfy the high pincount and performance requirements in the 1997 Roadmap, flip-chip will become the predominant technology for chip-to-next level interconnect. Wirebond technology will continue to evolve and will be the dominant interconnect for commodity products until flip-chip costs become favorable." 1 Three of the five challenges identified in the 1997 Roadmap as difficult deal with flip-chip packaging. The first of these is to improve organic substrates for high I/O area array flip-chip attach. The specific goals cited are glass transition temperatures compatible with eutectic solder processing, a relative dielectric constant approaching 2.0, a coefficient of thermal expansion (CTE) approaching 6.0 ppm/degree C, lowered moisture absorption and increased wireability at a lower cost.The second of the difficult challenges is to improve underfill materials for high I/O area array flip-chip attach. Specifically mentioned are speeding dispense and cure, improving interface adhesion, lowering moisture absorption, improving flow for denser bump pitches and providing reliability above 150 degree C for automotive applications. Reliability issues for flip-chip packaging on organic substrates is the third difficult challenge. According to the Roadmap, standard methods and acceptance criteria for interfacial adhesion are lacking, and fundamental work is needed to determine adhesion strengths and degradation rates as a function of environmental, physical and chemical properties. Also, a uniform set of environmental expectations for each market segment is suggested to help ensure consistent reliability performance. Reduction of lead (Pb) use is necessary not only for environmental concerns, but also as a part of the plan to reduce alpha particle- induced soft upset. Environmental concerns are to be dealt with by reducing the use of hazardous materials, such as Pb and some plating baths, and by eliminating others, such as krypton-85 for leak tests, cadmium for rust protection, antimony trioxide and bromated flame retardants, and beryllium in substrates. General reduction in the use of water, energy and chemicals is also called for, as well as minimizing waste mold compound. In addition to these, an overall integrated approach to design, measurement and simulation appear to be the rule. Chip and package design cannot be separate anymore. Some classical packaging functions, like hermetic sealing, are expected to move to wafer level processing, so that less is required from the package. The entire system of the chip, its package and the materials used will have to be considered at all product life cycle stages, from design through to final test. |  | Company News
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TRW (Redondo Beach, Calif.) agreed to acquire MilliWave Technologies Corp. (Diamond Springs, Calif.), a privately held firm that specializes in the design and manufacture of multichip modules used in high-capacity wireless communications systems. The new company will be known as TRW MilliWave Inc.
