TSMC Reveals 300 mm Ramp Details
-- Semiconductor International, 8/1/2001
In the keynote speech at the IITC meeting in June, Nun-Sian Tsai, senior director of TSMC's (Hsinchu, Taiwan) 300 mm pilot line, disclosed the company's experience in yield and productivity ramping of its 0.18, 0.15 and 0.13 µm technology products on 300 mm wafers. He explained that the company's fab was able to demonstrate 0.18 µm yield metrics comparable to those on 200 mm product early in the wafer size change, which should lead to a 300 mm transition that exceeds industry expectations.Tsai described the company's Fab 6 line in Tainan, Taiwan, as the largest 300 mm fab in the world at 17,000 m2. It uses a batch size of 25 wafers, a completely automated overhead transportation (OHT) system and tool-specific automation, along with interbay/intrabay transportation systems modeled after those used in its 200 mm fabs. TSMC will be developing a next-generation computer integrated manufacturing (CIM) system in the 300 mm fab. The fab is scheduled to operate at 30% capacity in 2002, and to realize an overall 30% cost savings sometime in 2003 or 2004.
Tsai detailed many of the challenges associated with the 300 mm transition. For instance, major tool upgrades were required to raise 300 mm tool productivity in the etching, photolithography and metrology areas. The majority of fab tools (average of ~80%) used the same tool type and scale-up recipes as in 200 mm fabs. However, in cases where a tool change was made or the manufacturer did not offer the same tool from 200 to 300 mm, new recipes had to be developed before integration work could begin. Photolithography tools transferred most readily, and the most changes were made in the etch area. When new tools were introduced, the 300 mm systems had to meet the module results from the 200 mm tools, although the recipes might differ. For instance, in polysilicon etching, the expected etch rate and etch uniformity were the same at each process sub-step - including the breakthrough step, bulk etch step and over-etch step. "By having the same results from items such as poly physical profile, top corner and bottom corner shape, the transition of process recipes from 200 to 300 mm was smoother than we anticipated," Tsai said.
The overall transition followed a copy-exact model. The first 0.18 µm pilot lots for both SRAM product (three metal levels) and logic product (six metal levels) produced device characteristics - including threshold voltage, saturation current, leakage current and isolation voltage - that were ±5% of the 200 mm baseline. SPICE parameters were very close to the 200 mm data. Product quality in terms of gate oxide quality, electromigration resistance, hot carrier injection resistance and threshold voltage stability were all comparable to 200 mm product. Both the 0.18 and 0.15 µm products used aluminum metallization, while the 0.13 µm technology will use copper. TSMC expected the defect density of the 0.18 µm product to match that of the yield on 300 mm wafers in Q2 2001.
Finally, TSMC tracked the 300 mm tool productivity performance since Q3 2000 using a range of 1-5, with 5 representing a perfect score. Most tools scored ~3. Areas with the lowest throughput included CVD, photolithography, furnaces, defect inspection and metrology, where productivity was 30%, 70%, 60% and 70% that of the 200 mm modules, respectively (Table). Although the CVD, PVD and CMP tool throughputs were comparable to that of 200 mm, the available time for production was lower compared with 200 mm systems. TSMC expects the productivity of all 300 mm modules to match that of 200 mm modules in 2002 or 2003.
| Table. 300 mm Tool Productivity Maturity | ||||
| Tool | 200 mm baseline (1.0x) | 300 mm productivity in 2001 | Expected productivity in 2002, 2003 | Major upgrade required |
| Photo | 1.0x @ wafer passes/day | 0.6x | 0.9x | Yes |
| Etch | 1.0x @ wph | 1.0x | 1.2x | No |
| Wet bench | 1.0x @ wph | 0.8x | 0.9x | No |
| CVD | 1.0x @ preventive maintenance | 0.3x | 1.0x | No |
| PVD | 1.0x @ available time | 0.9x | 1.0x | No |
| CMP | 1.0x @ available time | 0.8x | 1.0x | No |
| Furnace | 1.0x @ wafers/day | 0.7x | 0.9x | No |
| Implant | 1.0x @ wafers/day | 1.0x | 1.0x | No |
| Defect inspection | 1.0x @ wph | 0.6x | 1.0x | Yes |
| Metrology | 1.0x @ wph | 0.7x | 1.0x | Yes |
| (Source: TSMC) |
"The tool maturity is there," Tsai said in summary. TSMC's focus now is on tool productivity optimization to attain 30% cost savings in the 300 mm fab. It demonstrated that the same level of product and process quality (yield and device performance) can be achieved with 300 mm wafers. Between 2003 and 2004, the wafer cost ratio of 300/200 mm is expected to reach 1.58. In Q2 2001 the value was 2.25.
- Laura Peters
