Closing the E-Beam and Optical Defect Gap

From a yield/control and product requirement perspective, defectivity looms large in copper processing at the 0.13 µm node. While a handful of manufacturers such as AMD, IBM and Intel are successful at 0.18 µm, the landscape alters drastically at 0.13 µm, as trench widths narrow and control becomes complex.

Defect propagation is a major concern for copper. ILD deposition, the lithographic definition of vias and trenches, uniformity problems such as etch uniformity resulting in varying angles or slight trench aspect ratio changes, the coverage of the seed barrier deposition and anomalies in electroplating — any of these can create defects such as voiding. Since these problems occur below the surface, they are difficult to detect.

Presently, many of these anomalies can be detected electrically at final test, but this leaves thousands of wafers at risk. For in-line detection, e-beam system providers have offered some relief with voltage contrast, using product wafers to determine how to identify differences occurring from one structure to the next, and using the surface voltage potential on specific structures. However, once an electrical defect is identified, an understanding of its cause is required, making it necessary to source back to prior steps, to the primary optical inspection.

Defects are evident in e-beam (left), but not in optical inspection (right). Although optical resources barely show the defect and e-beam clearly delineates it in this example, these two techniques must integrate and work together to meet future inspection needs. (Source: KLA-Tencor)

Traditionally, electrical results have been obtained through test structures, using SRAM full-flow wafers or some short loops. Typically, weeks pass before results are obtained for a probing at line's end. Results then must be correlated back to the specific process step at which the defect first occurred — no small task, considering the hundreds of steps required in advanced processes. Too much effort and time are wasted to get this information.

The industry needs better, faster in-line electrical methods that work with optical. Optical inspection's value could be vastly improved by giving it the capability to determine which detected anomalies cause electrical problems. Working at increasingly smaller pixel sizes complicates image processing, increasing inspection time per wafer. A methodology is needed for a quick in-line identification of electrical defects, providing more cycles of electrical learning at a faster pace. This would accelerate the yield learning rate in development and allow faster fab ramp-ups, avoiding the old approach of getting minimal functionality in R&D and passing on the problem to manufacturing.

Because copper processes are so interrelated, after everything has been put together it may be impossible to deal with defect propagation by making a minor tweak to eliminate a particular problem. A complete reengineering of the entire process may become necessary — the domino effect at its worst. At 0.13 and 0.10 µm, the engineer faces 50M to 100M logic transistors, and determining what went wrong electrically at line's end is thorny.

Faster, new-generation e-beam inspection systems appear every one to two years. Some suppliers are working on novel methodologies. Hopefully, they soon will make e-beam techniques and system methodologies available that combine electrical and optical to optimize quick learning and yields.

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