Copper Metrology Gains Complexity, Capabilities

For a long time, semiconductor manufacturers considered metrology a non-value-added item that detracted from the bottom line. As we have advanced to smaller CDs and begun adopting exotic materials such as copper and low-k dielectrics into our products, the ever-shrinking process windows that have resulted are rapidly changing this view. Metrology is not only being integrated, but is becoming an integral part of the fabrication process itself (Fig. 1).

There are obvious goals for copper metrology such as quick process monitoring, said Gary Ray, director of integration at Novellus Systems Inc. (San Jose). "Defect monitoring is continuously challenged, because you're trying to detect increasingly smaller particles against a polycrystalline background. This shifts as a function of changes in copper annealing — reflectivity changes, altering surface roughness."

Yogev Barak, director of CD-SEM metrology at Applied Materials (Santa Clara, Calif.), views measuring trench CDs (bottom width, high aspect ratio features) and trench height as copper metrology's primary challenges. "These determine trench resistivity performance. Measuring them is a process control must."

Slope is another measuring hurdle. "It's necessary to calculate trench resistivity for improved copper process control inside the trench. Other factors are the detection of open and closed vias, both at the litho process and after the etch process," he added.

"Copper" means back-end interconnect for Scott Ashkenaz, vice president of patterning and parametric module control solutions for KLA-Tencor (San Jose). "First you put down the interlayer dielectric layers, which may be low k," he said. "You have intricacies with both organic spin-on and deposition, and these must be managed and controlled. Naturally, characterization comes before control."

1. The increasing complexity of copper processes, allied with the use of exotic materials, low k and shrinking CDs, has demanded quantum leaps in metrology’s capabilities. This technology can no longer be considered a non-value-added facet of fabrication. (Source: Novellus)

Saket Chadda, vice president of process engineering and CTO at SpeedFam-IPEC (Chandler, Ariz.), believes endpoint detection has matured. "There are options — motor current system, optical endpoint and its variations with single- vs. multi-wavelength systems, as well as multi-angle types of endpoint detection. Another kind are eddy-current-based systems."

Metrology systems are being incorporated into some tools or stand-alone systems to measure various copper CMP aspects. "In situ thickness measurement is one. If one lacks good control over removal rate — and one has a multi-platen or multi-slurry process that requires switching platens or slurries — one must measure the film's mean thickness in situ," Chadda said.

Single-point closed-loop control is an industry bulwark. It tracks a single factor from run to run, such as removal rate. Parameters such as time are changed to keep removal rate within a pre-set range. What is needed is multi-parameter closed-loop control capable of changing multiple parameters. "However, this can create problems," Chadda said. "Say you're looking at removal rate and it's dropped or increased. You respond by changing the recipe's pressure or time. When you do that, you're making assumptions about the root cause — that is, assuming that what you're compensating for is the root cause. Increasing pressure in response to a falling removal rate brings it back to where it was, but if the root cause lies elsewhere, this may create ramifications that aren't being monitored, such as within-die uniformity. We need closed-loop control, even multiple-parameter closed-loop control, but with the capability to define the automatic response parameters. Thus, you may provide the capability to alter both removal rate and within-wafer uniformity by changing the pressure or platen speed and time of polish on the wafer only ±5%."

Post-CMP effects pose roadblocks. "Most defects aren't CMP-connected, but are traceable to plating phenomena," said Novellus' Ray. "There's an ongoing effort to reduce plating-related defects to handle higher aspect ratios."

2. Post-CMP effects produce problems. Most of these are unrelated to CMP, resulting from aspects of the plating process. As yet, there is no tool as sensitive as an electrical test structure to work with CMP defects in the copper pattern. (Source: Novellus)

Another metrology consideration is CMP defects on the copper pattern — dishing and erosion. "Today's techniques are slow and not broadly applicable. They work for specific structures. I've yet to see a tool that's as sensitive as an electrical test structure, capable of looking at a broad range of structures," Ray explained.

To monitor dishing and erosion in-line faster, broadly applicable techniques are needed. Most available laser techniques have problems with pattern variation and in differentiating levels. "They work best with specific test structures," he said, adding that these are too slow for in-line monitoring.

Giora Dishon, president and CEO of Nova Measuring Instruments (Rehovoth, Israel), believes major technological trends lie in material optimization and subsystem property monitoring. "Since copper interconnection will be implemented mainly in 0.13 µm technology and below, material and geometrical properties control are important issues," he said. "Variations in geometry, chemical composition or other physical properties — grain size, barrier chemical composition and thickness — affect performance and yield. This'll increase in importance when copper is combined with advanced low-k materials."

Copper metrology must cope with large-scope applications in a single process. It thus becomes necessary to identify the most important properties to be monitored in a "moving target" situation, since process details and production equipment are not yet mature.

"With process windows constantly narrowing, copper metrology needs sufficient margins to cope with increasing accuracy requirements," Dishon said. "In terms of specific applications, the main process control [metrology and inspection] hurdles in copper CMP processing are measurement of oxide erosion, copper dishing, and copper and barrier residues. The best approach is to integrate a multiple-applications system within the polisher."

"Trench height and slope measurement sit at the head of the problem table," said Applied's Barak. Like others, Applied is developing in-line systems to measure these feature attributes. The 3-D/CD-SEM platform approach is a way to tackle this. Its tilt capabilities enable it to construct the trench's profile by measuring both the bottom and profile, determining height and slope.

"With 3-D SEM you see to the features' bottom, providing an image of what you're measuring," Barak said. "Scatterometry is a complementary approach. It measures features by analyzing light emitted from the trench bottom to get the profile, and will be used as a monitoring tool."

Sensitive low-k materials complicate metrology. With SEMs, lower accelerating voltages must be used to minimize charging effects on layers and avoid damage. "We can go down to about 300 V and maintain imaging performance," Barak explained. "We must now reduce accelerating voltages even further, without surrendering basic resolution and DOF performance."

FEI (Hillsboro, Ore.) has worked for years on 3-D metrology for the data storage industry, said Nick Dawes, director, structural process control products. "Because of larger linewidths, we had a better starting reference point, instead of going directly into semiconductors." Today, 100 nm linewidths are not unusual for that industry. "Now, we're well cued in to even the semiconductor industry. We work on their products and lithographic stages," he said.

3. Traditional 2-D CD-SEM (left) and 3-D metrology (right) images. The 2-D image shows nothing about the structure underneath, and the measurement of the contact holes is not clear or repeatable. The 3-D image shows the entire structure (width wherever it needs to be controlled and sidewall angles). (Source: FEI/ASML)

Nickhil Jakaedar, director of technology at Tokyo Electron Ltd. (Austin, Texas), sees optical metrology heating up. "It'll do well in copper, because before depositing it you must build damascene trenches into the oxide. These are close to being transparent, and lend themselves well to optical techniques."

He added that unlike aluminum — which can be laid in a very planar way — copper lends itself to dishing and erosion. "When measuring a grating pattern with copper inlaid into it — and the understructure is also copper that's dished and eroded — it might be simpler to analyze optical signals to extract factors like thickness and critical dimension since the underlying erosion might throw off the signal, unlike aluminum, which is so planar that it acts as a mirror." During planarization, this is harder to achieve on a copper surface because of the polish process's pattern density dependency. There is more planarity variation across the wafer, adding hurdles when the manufacturer is trying to build structures and add layers to it.

"R&D is needed to determine how to take into account non-planar copper surfaces into a diffraction-reading model," Jakaedar said. Possibilities being considered are putting grating structures underneath the grating rather than using planar copper under the grating, which experiences dishing and erosion. This might reduce the global dishing problem, thereby localizing it.

Things get interesting for low-k applications. It is harder to measure on the wafer, but a charge measurement system can determine dielectric constant. "It measures electrical film thickness, so the focus is on how well it correlates to optical film thickness," said KLA-Tencor's Ashkenaz. "Manufacturers are accustomed to measuring film thickness using UV-SE, and are learning to measure electrical film thickness using charge measurement — but what if these don't agree? Then there's a deviation in electrical properties."

KLA is working with fabs to understand what it is about deposition that causes this deviation. "We're finding that there are cases — stoichiometry or post-treatment methods — that can cause deviations between these two," Ashkenaz said.

Considerable effort is devoted to CMP control. By having metrology not just integrated but in situ, better control results. KLA developed a platform that uses a combination of optical and eddy-current metrology technologies to provide real-time thickness measurements, enabling faster polishing of the bulk thickness of copper without underlying layer erosion. The system's optical module uses a single-wavelength, multi-angle reflectometer to eliminate false endpoint reporting.

"Once the film is laid down, we must cut holes into it," Ashkenaz explained. "These are both vias and metal — for the early layers they're at or near the node design rule, so there are low-k₁ patterning questions. As the low-k₁ decreases, particularly for vias, patterning problems increase. Minor defects, small size errors on the reticle's pattern, can cause a via to not print well. You need sufficient sensitivity to detect via size differences and to ensure process window integrity."

Once the resist is patterned, etch comes. "There are a couple of approaches for patterning trenches and vias — you pattern the via first or the trench first, followed by the other one. Both have issues," Ashkenaz said. "If you pattern the trench first and the via later, you must stop the trench before hitting the barrier layer — measuring trench depth is crucial because it must be patterned to the right depth. Conventionally, depth has been measured with an AFM, but AFMs aren't production-worthy."

High-resolution profilometers (HRPs) tend to do better. An HRP does not give as detailed profile information as an AFM, but it does provide the critical depth information.

There are two major complications in the back-end area: the metal and the dielectric, said Andy Kirkpatrick, KLA-Tencor's vice president of marketing for the Film and Surface Technology Division. "From a film perspective, as we move to exotic materials, a major hurdle is the dielectric itself. We're seeing metrology needs for new process control problems in characterizing these materials. Since most films are SiO₂-based, it isn't so complex. Nanopore materials will make it hairy. Manufacturers will need to know material thickness and properties that include refractive index, pore size and distribution."

Copper damascene presents enormous metrology hurdles such as controlling thin barrier seed films. "Manufacturers are etching holes and putting down these tantalum nitride barrier films with a copper seed on top for plating — and control of this is very critical," Kirkpatrick said. "By monitoring the films' thickness, they're trying to ensure a conformal film. Since they cannot measure directly in the trench or via, they use a field to measure the thicknesses. To electroplate they need conformality and copper seed continuity to ensure a barrier, otherwise it could pinch off at the top and cause a void." These voids are then almost invisible, detectable only with e-beam inspection using voltage contrast.

Manufacturers still lack resources to control the barrier seed process. Additionally, they are changing the barrier films and going from tantalum nitride to a tantalum on tantalum nitride — so now there is copper on tantalum on tantalum nitride. Applied Materials announced a TiSiN barrier film, which can get even thinner. Therefore, the barrier film is going from 300 Å of TaN to 150 Å of Ta on 150 Å of TaN, to 50 Å of TiSiN — all of these with 1000 Å of copper on top. Plus, manufacturers want to do copper and barrier deposition on the same platform, and measure it to control it.

The X-Ray Products Group at Therma-Wave (Fremont, Calif.) was formed to consider metrology for new materials — such as copper seed, tantalum barriers and tantalum alloy barriers for some of the thinner multi-layer metal stacks, said William Johnson, the group's general manager. The first tool developed was based on X-ray reflectometry (XRR), a mature technique unique in that it makes absolute measurements of thickness and material densities without mixing them. "With other techniques, when you measure thickness it involves material properties — whether a refraction index or the speed of sound," Johnson said.

Seed barrier control for copper metallization is problematic for existing metrology. "You need a conformal coating of the barrier material — whatever it is — but it cannot be excessively thick because current materials have high resistivity. You must have a thin but conformal barrier," he added.

CVD materials pose another concern. The process gets gas residue in the film. If MOCVD is used to put down TaN, the film will contain hydrocarbon compounds. Work is underway on a means to post-treat CVD film barriers, reducing contaminant content. CVD is a fairly volatile process, followed by post-deposition plasma treatment of the films. Metrology is required to monitor the process and order corrections when parameters drift away from the process window.

The focus at Nanometrics (Milpitas, Calif.) is on measuring oxides or dielectric films deposited on copper layers that act as substrates, said applications scientist Ray Hoobler. "From a metrology standpoint, issues arise from copper's high reflectivity in the red and near-infrared (NIR) portion of the spectrum. We're looking at the reflectance spectrum, and the high reflectivity from the copper dominates and obscures oscillations that would normally be visible."

Nanometrics's modeling is based on regression analysis, and if the curve or the oscillations seen in film measurements are made invisible by high reflectivity, it complicates the fitting algorithm.

Spectroscopic ellipsometry (SE) provides two quantities: ψ and Δ, with ψ being dependent on the total reflection coefficients and Δ dependent on the phase shift induced by the reflection. While the measured value of ψ suffers from the same washing-out effect as the visible reflectance data, Δ is not affected by copper's high reflectivity in the red and NIR.

Currently, SE measurements are done on stand-alone tools and not integrated. While using a stand-alone tool and getting ψ, Δ and reflectance data enable thickness and index measurements, making measurements with an integrated tool more desirable. "We now have integrated tools that operate into the near-UV and DUV, down to 190 nm, where copper's high reflectivity is no longer a problem," Hoobler said.

Surface quality influences measurements. "Copper substrate uniformity isn't ideal," he explained. "We've been spoiled by planar silicon surfaces. Surface roughness affects reflectivity and adds difficulty when modeling." Reflectivity is just part of the film or substrate characteristics, and many current tools are based on visible reflectance, visible SE, Hoobler added.

Hank Mallin, product manager of the Microelectronics Systems Department of Nikon Instruments (Melville, N.Y.), views copper contamination as metrology's major problem. "The problem is the repairing and replacement of assemblies and circuit boards, to bring metrology and process tools up as quickly as possible. Circuit boards and assemblies are often swapped in the field and repaired at service centers.

"Separate areas will be needed to store and repair copper and non-copper components to ensure they're going into the proper tools at the fab. Specialty tools and alignment equipment must be dedicated and kept separate. Before working on a non-copper tool component, technicians must ensure they're not contaminated after repairing copper tool components."

Metrology is rising to the challenge of identifying and lessening the impact of process excursions by providing faster, more accurate responses. The days when this part of semiconductor production was considered a non-value-added expense are over, as metrology is not only integrated into the process, but becomes a part of the process itself.