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Massive Mask Data Calls for New Methods

Dealing with the ballooning volumes of mask data was on the agenda at the SPIE Photomask conference in Monterey, Calif., this week, following similar discussions at April's Photomask Japan in Yokohama.

Alexander E. Braun, Senior Editor -- Semiconductor International, 9/17/2009

The looming introduction of double patterning, pixilated masks, inverse lithography technology (ILT), source mask optimization (SMO), and other enhancement techniques has created huge data handling and mask manufacturing challenges. Moreover, the mask industry is facing future demands from EUV-specific mask pattern correction.

Participants at the SPIE Photomask conference in Monterey, Calif., this week took up the topic of handling the massive data volumes in computational lithography, following a panel discussion on the subject at Photomask Japan 2009 in Yokohama. At this week's Monterey meeting, Kokoro Kato, a manager at Seiko Instruments (Chiba, Japan), provided an overview of the Yokohama panel discussion, where experts discussed solutions that will reduce the cost of the computational processes required to deal with the escalating amounts of mask data.

Parallel computing schemes are needed to cope with larger mask data sets. (Photomask Japan 2009)
Parallel computing schemes are needed to cope with larger mask data sets.
(Photomask Japan 2009)


Dario Gil, an advisory engineer at IBM Corp.'s Advanced Imaging Group, developed an analysis of the computational costs of a mask data preparation flow. Gil concluded that the industry should not assume that a reduction in computational complexity will result in overall cost benefits. It may still be necessary to continue performing increasingly complex operations to build mask data in order to improve yields and reduce overall IC development costs.

Increasingly complex optical proximity correction (OPC), simulation-based verification, and other computational techniques outweigh their costs. Simulation-based, or virtual, fabrication is cheaper and faster than silicon-based learning, though both are needed, he argued.

Steffen Schulze, product marketing manager for Calibre MDP at Mentor Graphics Corp. (Beaverton, Ore.), observed that there are six levels of parallelization in tackling data volumes in mask preparation: redundancy, data parallelization (cells, tiles), functional parallelization, computational parallelization, acceleration involving alternative computation approaches, and data simplification and compression. Processing parallelization should compensate for the additional time required in some processes.

Noriaki Nakayamada of NuFlare Technology Inc. (Yokohama, Japan) said he expects single-beam writing to continue for a time. He observed that multi-pixel lithography is very compatible with massively pixilated computational lithography, with the limit reached at the 15 nm node, when EUV is expected to become mainstream.

Gregg Inderhees, senior director of marketing and applications at KLA-Tencor (Milpitas, Calif.), noted that although file sizes are increasing, with a current record of 250 GB, there are ways to cope with this. He mentioned that flat, non-hierarchical data is generally better for mask inspection cycle times, and that hardware improvements have enabled toolmakers to keep up with data volume increases. Inderhees expects no major issues from double patterning or more complex OPC, although he did suggest that inspection preparation should begin concurrently with mask writing.

Rik Jonckheere, part of the EUV effort at IMEC (Leuven, Belgium), focused on EUV mask pattern correction. According to him, proximity effects are less pronounced in current EUV, and he expects proximity correction to become necessary at the 22 nm node. He also observed that OPC is "abused" and sometimes used for more than just the correction of optical proximity. He suggested it be called EUV mask pattern correction (EMPC), which includes the compensation of shadowing (azimuth, flare), mask flatness (bow and chucking), apodization, real optical proximity, etch bias on the wafer, as well as many others.

The Photomask Japan panelists agreed that it is important to work closely with suppliers to produce faster and more-efficient software algorithms. Also needed are novel ways to handle increasingly computational loads and data volumes, where there is room for optimization and innovation. Kato said there is agreement on a need to make OPC data as mask-write-friendly as possible. The center for mask data processing needs to be near to the maskmaking facility, reducing the issue of handling large data sets, he added. 

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