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Sematech Seeks EUV Mask Tool Funding

Few commercial suppliers are stepping up to develop the EUV mask inspection tools that will be needed for 22 nm EUV patterning, said Bryan Rice, director of lithography at Sematech. The consortium is organizing a meeting at SEMICON West of government, consortia and private industry leaders to develop financial support for the EUV mask infrastructure.

David Lammers, News Editor -- Semiconductor International, 6/30/2009

With few tools in development for the EUV mask infrastructure, Sematech (Austin, Texas) said it will convene a meeting during SEMICON West to garner financial support from companies and government sources. The goal is to entice commercial suppliers to develop EUV mask blank inspection, mask defect review, and mask pattern inspection tools.

Bryan Rice, Sematech
Bryan Rice, director of lithography, Sematech

"We are approaching all companies, consortia and government funding agencies, in a broad-based effort to obtain funding from all sources," said Bryan Rice, director of lithography at Sematech. Some optical inspection tools, such as the M7360 mask blank inspection tool from Lasertec (Yokohama, Japan), have been adapted to EUV inspection and might serve the needs of the pilot lines using EUV lithography. However, Rice said the Lasertec tool, and the KLA-Tencor mask pattern inspection tools, are targeted at 32 nm half-pitch (HP) designs. In particular, the high- volume manufacturing (HVM) solutions needed for 22 nm manufacturing "do not exist, and funding is a big problem," he said.

Sematech's goal is bring EUV scanners into corporate pilot lines by 2011 to support 22 nm HP development. By 2013, plans call for EUV to be in use for HVM lines. Although EUV source development remains a major challenge, Rice said companies are funding source and resist development, providing hope that solutions will arrive in time. The mask infrastructure, however, is a different story.

"Mask blank inspection tooling has no commercial suppliers who have committed to building the tool," Rice said, with identical challenges in mask defect review and mask pattern inspection. Sematech has decided to fund a yet-to-be-identified supplier for the mask deposition tool. The strategy is to find a bridge tool supplier for an aerial imaging measurement system (AIMS) tool that initially would have the capability to support the pilot lines expected in the 2011 time frame, he said.

To date, Rice said, nearly all the funding in support of the mask infrastructure has come from Sematech. The consortium will devote most of its lithography budget over the next four years to the mask infrastructure issue, as it tries "to find funds and identify suppliers. To that end, we have a workshop planned in conjunction with SEMICON West to get the leaders of the EUV community to tackle this specific problem."

Sematech seeks suppliers of HVM mask tools for EUV lithography.
Sematech seeks suppliers of HVM mask tools for EUV lithography.


Memory IC manufacturers, Rice said, have become enthusiastic supporters of EUV lithography, which promises to keep the NAND flash and DRAM manufacturers on their roadmaps to higher bit densities. Although logic IC vendors also would like to see EUV provide a single-patterning solution, he said their half-pitch roadmaps are somewhat more relaxed than the memory companies. Once EUV becomes a workable solution, the logic vendors will "jump on it in a heartbeat," he said.

At SEMICON West, Rice will deliver a presentation on the EUV infrastructure challenges Wednesday, July 15, at 4:10 p.m., wrapping up an afternoon TechXPOT session on Lithography Challenges and Solutions that kicks off at 2 p.m.

 

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