Novellus Adapts Resist Strip for 3X Node
Novellus Systems said it has developed a photoresist stripping process that meets the challenges of the 3X technology generation. The approach, based on the company's multi-station sequential processing architecture (MSSP), independently controls the chemistry and temperature at each process station.
Staff -- Semiconductor International, 5/14/2009
Novellus Systems Inc. (San Jose) said it is adapting to tougher requirements for photoresist strip and clean at the 3X technology generation. “Higher-dose implants are creating significant photoresist removal challenges at the 3X/2X technology nodes,” said David Cheung, director of technology for the company’s Surface Integrity Group.
Shallower junctions and more abrupt gate electrode profiles are driving lower-energy, higher-dose implant steps, with doses typically in the 1015-1016 cm-2 range. These higher implant doses, Cheung said, are necessary for improved device performance, but they create challenges for photoresist removal. One challenge is the formation of thicker, cross-linked polymer crusts on the top surface layer of the resist. Rapid removal of this crust at higher temperatures can lead to resist “popping,” a condition where solvents in the resist outgas through the crust and generate residues on the wafer surface. After the crust is removed, the bulk resist is stripped away and any remaining residues are cleaned from the wafer surface.
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| High-dose implants cause a photoresist crust, which thickens as implant doses increase. |
Use of a fluorine-based chemistry such as CF4 is the most efficient gas for this task, the company said. However, use of fluorine technology can be a challenge for some plasma-based systems requiring specific hardware modifications. In addition, the multiple temperatures and chemistries required for the high-dose implant strip (HDIS) process pose significant throughput challenges for strip systems based on single-wafer process architectures, the company said. Other vendors, such as FSI International Inc. (Chaska, Minn.), are developing single-wafer cleaning tools for implanted wafers.
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| Adding CF4 improves resist residue removal. |
Novellus said its approach involves a residue-free strip process using CF4-based chemistries. The process runs on the GxT photoresist strip platform that uses Novellus’s multi-station sequential processing architecture (MSSP) to independently control chemistry and temperature at each process station, Cheung said.
In the first step, the polymerized crust is removed, without popping, using an optimized process temperature. Subsequent stations, set to different temperatures, quickly remove the remaining resist and eliminate any residues from the wafer surface. No temperature or gas stabilization time is required between these steps, the company said, as would be required in a single-wafer tool. MSSP enables the integration of optimized temperatures and chemistries for crust removal, bulk strip and residue cleaning without sacrificing overall throughput. The GxT system has been engineered to be CF4-tolerant, resulting in “world-class defectivity levels under high-volume manufacturing conditions,” Cheung said.
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