TechSearch: Steady Growth Ahead for Flip-Chips, WLP
Flip-chips and wafer-level packaging (WLP) are emerging as industry "bright spots," with a continued growth rate of 14% forecasted for both flip-chips and WLP between 2007 and 2012, according to a study by TechSearch International Inc.
Sally Cole Johnson, Contributing Editor -- Semiconductor International, 10/14/2008
Flip-chips and wafer-level packaging (WLP) are each on target to grow at a steady annual rate of 14% from 2007 to 2012, according to a new report from market research firm TechSearch International Inc. (Austin, Texas).
|
| TechSearch International forecasts steady 14% annual growth rates for flip-chip packaging. (Source: STATS ChipPAC) |
The drivers of these two market “bright spots” are primarily performance and form factor. “One of the high growth areas for 2009 is wireless applications, where flip-chip will be inside the chip-scale package (CSP),” said Jan Vardaman, president and founder of TechSearch. She pointed out that an increasing number of suppliers of ASICs, FPGAs, DSPs, chipsets, graphics and microprocessors are expanding their use of flip-chips with solder bumps and copper pillars in package (FCIP). And flip-chip on board (FCOB) continues to find applications in automotive electronics, hard disk drives and watch modules.
WLP growth is also being driven by increased demand for ever-thinner, lighter-weight portable products, according to Vardaman. Although WLP has typically been used for chips with low pin counts (≤50 I/O) and small die sizes, they’ve also become an option for larger die sizes with higher pin counts (≥100 I/O).
“There are two new developments in WLP from a technology perspective,” Vardaman said. “Larger die sizes with higher I/O in production, and the planned use of fan-out WLP. The most significant change in technology for flip-chip bump is the copper pillar and future plans for microbumps for through-silicon via (TSV) applications.”
Gold bump demand continues to be driven by LCD driver ICs, but TechSearch is seeing die shrink limit the growth in number of wafers. “The demand for gold stud bump varies by application,” Vardaman said. “In some cases, it’s the ability to put the die close to the substrate, shrinking the size of the package, which is very important for package-on-package (PoP) applications. In other cases, such as high-brightness LEDs, it’s thermal dissipation and other reasons.”
Asked whether the global economic situation is likely to affect prices of flip-chip and WLP materials, Vardaman said, “So far, material prices have been rising with the price of oil and the energy-related production costs.”
