Letter to the Editor
Bo Lojek, Atmel Corp., Colorado Springs, Colo. -- Semiconductor International, 9/1/2003
When chemist Gordon Moore first published the article in which he plotted a chart of the log of the components per integrated function, which doubled every year,1 very few people understood the meaning of integrated function. And no one had any idea that this speculation, based on numbers seemingly pulled out of a hat, would prove to be so crucially important to the future development of the semiconductor industry.
I remember when I read the article, thinking that its language was vague and was trying to be somewhat comical with a cartoon about cosmetics and a computer. There was no reference to where the numbers came from, and the chart did not include data points for already established numbers, such as that associated with the first planar integrated circuit developed by Last, Haas and Kattner of Fairchild. This IC contained six components and was demonstrated in November 1960. Later, one of Fairchild’s Micrologic elements (half shift register), designed by Norman and Anderson, had 48 elements, and should have set the number of components in 1975 to 196,608, not 65,000 as Moore predicted. This really does not matter, because the chart never fit data well in the first place.
When Intel introduced the 8080 processor in 1975, the number of transistors was just below 5000. In the coordinate system Moore chose (log2-lin), even if the numbers changed by 100%, they would still appear as a reasonable fit to a straight line on a logarithmic plot. When I looked at the bottom of the page of Moore’s article, I saw: “Electronics, April 1965.” I thought the article was one of the editor’s April Fools jokes, and I quickly forgot it.
I started to pay attention to the article many years later when Moore’s observation suddenly became “law.” I paid even more attention when Moore’s Law became the doctrine of advanced semiconductor companies.
Let’s for a moment pretend that Moore’s Law is Law and we will follow it. According to the data Moore presented at the ISSCC in February,2 both Intel’s update and the ITRS 2001 forecast a feature size of 400 Å around 2010 (Fig. 1 ). If this trend is correct, the 128 Gb DRAM will have a feature size of 400 Å and a die size of ~40 × 90 mm. If we assume that production will be done on 300 mm wafers with 100% yield, each wafer will have 12 die. From the past, we know that, typically 10 months after product introduction, prices drop by 50%. Extrapolation to 2010 indicates that a semiconductor manufacturer will spend roughly $3-4B on a manufacturing fab, $1-2M on a mask set, pay a premium for 300 mm starting material, and produce 12 die per wafer, and each chip will sell for a few dollars. Sound like nonsense? It not only sounds like nonsense, it is.
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1. Mask costs have rapidly escalated from ~$55,000 at the 0.25 µm node to $250,000 at 0.18 µm, >$600,000 at 130 nm, and now >$1M at the 90 nm node.
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Compare the 128 Gb DRAM or equivalent logic products from another point of view. The butterfly, whose brain processing capabilities are estimated by biologists to be at most equivalent to a 2 or 3 bit microcontroller, has wing features on the submicron scale (Fig. 2 ). A butterfly is able to perform 3-D flight control, real-time pattern recognition, and can self-duplicate with a typical yield of 300-400%. If you still think that this is not enough functionality for a 3 bit controller, consider that the butterfly, through extremely sophisticated radiation exchange between different layers of his wings, changes wing color in the UV region to signal to other butterflies that it is ready for sex.
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2. SEM photograph of butterfly wing: At left, a stacked structure corresponds to bit lines (vertical) with multilayered word lines (horizontal); at right, the ~500 Å diameter plugs are connecting multilayered cells.
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Moore’s Law may make the most sense for Intel’s microprocessor products, where each generation increases die size and transistor count. However, there is and always will be a large class of microelectronic products that require only smaller die. For economic reasons, it is best to produce these chips using low-cost technology with smaller wafers. For example, in the ASIC business there are products that run in several large batches for 3-4 months on 200 mm wafers, and then they are never produced again. Not every product in the future will need six layers of copper, high- and low-k materials, and advanced photolithography ¯ which only the Top 10 semiconductor manufacturers can afford.
What is wrong with indefinitely utilizing 200 mm wafer production? The reason is very simple: International SEMATECH, SEMI and SRC are under the control of a few companies who are pushing the manufacturers of semiconductor equipment into developing tools for their needs; specifically, 300 mm tools. To illustrate the situation, consider Applied Materials. My company (Atmel), Microchip, National, Analog Devices, LSI Logic and similar small or medium-size companies form a significant customer base for Applied Materials. However, because the cost of development of new tools for new processes following Moore’s Law is so expensive and time consuming, companies like Applied cannot continue the development of advanced process capability (90 nm, 65 nm, etc.) on 200 and 300 mm tools.
In reality, small and medium-size companies are subsidizing, through the purchase of tools from Applied, the development cost of next-generation 300 mm tools, which they will not be able to afford later. Applied decided that new tools will be developed only in 300 mm versions, and already single-wafer wet-cleaning tools exist only in 300 mm versions, with no plans to extend production to smaller-wafer systems. This situation is similar with other equipment vendors. Is this a bad decision on the part of the equipment manufacturer? Of course not; they do not have any other choice if they want to stay in business.
One of the solutions to this problem is simple: Let’s establish a new law where technical progress is balanced with economic values. Gordon Moore suggested at the end of his 2003 ISSCC presentation that we should “delay forever” the end of his prediction. Unfortunately, the semiconductor business is not only about scaling of devices, but also about money, or to be more explicit ¯ it is only about money. In everything where money is involved there is no “delay” and absolutely no “forever.” The sooner we learn more from butterflies and forget about Moore’s Law, the sooner the semiconductor business will be better off.
Bo Lojek
Atmel Corp.
Colorado Springs, Colo.
blojek@atmel.com
References
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G.E. Moore, “Cramming More Components Onto Integrated Circuits,” Electronics, April 15, 1965.
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G.E. Moore, “No Exponential is Forever,” IEEE ISSCC, February 2003.
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