Interconnect Conference Expands Scope
Laura Peters, Lead Technical Editor -- Semiconductor International, 1/2/2008
After celebrating its 10th anniversary, the International Interconnect Technology Conference (IITC) committee decided to return to its roots, according to Mike Shapiro, member of the technical staff at IBM (White Plains, N.Y.) and IITC publicity chair. “We’ve gotten a lot of feedback from participants indicating that they’d like a greater focus on the science behind the processes themselves, so we’ve added a section on individual unit processes, where researchers can compare material properties, different tools or planarization results, for instance.” He added, “Before, a lot of the papers were integration-focused, where people presented the results of implementing an entire process, the performance and reliability. While we will still have these papers, we are getting back to the science behind the processes and materials, the chemical and mechanical events that are going on.” He said that there is also an effort to reach out to the manufacturing community to talk about manufacturing issues.
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| Multilevel copper interconnects shown after the interlevel dielectric has been etched away. (Source: IBM) |
The IITC committee also added a section on novel materials and concepts, which could include papers on optical interconnects, nanotechnology-based interconnects, new interconnect materials, etc. “At one time, we had several papers that looked at all the low-k candidates and compared them. We got away from that kind of presentation, but now we’re returning to these materials papers, which can be about low-k materials, metals for contacts, CMP slurry materials, and the science behind them,” Shapiro said.
Another new topical area is 3-D silicon processing. In this area, the committee is looking for papers on 3-D materials, 3-D with memory, process integration, interactions with packaging and reliability issues. This session complements other existing sessions on system-in-a-package (SiP) and system-on-a-chip (SOC), which includes flip-chip approaches, multichip modules, chip-to-chip interconnection and novel IC interconnects (SiP), as well as SOC processing, RF and high-frequency passives, MEMS/CMOS integration and embedded memory/3-D trade-offs (SOC).
The IITC will continue to provide a forum for the exploration of all interconnect concepts from on-chip to the system level, calling attention to the ultimate influence chip-level decisions have on system performance. There are sessions on process modeling, reliability and interconnect systems, in addition to those previously mentioned. The call for papers deadline for the June 1-4, 2008, conference in Burlingame, Calif., is Feb. 1.
The final significant change to the agenda is that the IITC will no longer be held exclusively in the United States. It will rotate between the San Francisco, Asia and Europe. While the IITC has always been an international conference, by rotating continents, it will be more readily accessible to attendees around the world.
