Inverse Lithography Gains Further Market Acceptance
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 9/17/2007
Luminescent Technologies Inc. (Palo Alto, Calif.) today announced the first U.S. order for its Luminizer Explorer (LE) inverse lithography system. The leading semiconductor manufacturer plans to use the resolution enhancement tool in its 32 nm lithography development flow.
Although this is the first LE order in the United States, Lumiscent has been steadily gaining acceptance for its Inverse Lithography Technology (ILT) for the past couple years. Billed as a replacement for optical proximity correction (OPC), ILT counters the typical iterative approach to resolution enhancement that’s used today, instead starting directly with the desired IC pattern on the wafer, and using inverse algorithms to deliver a manufacturable mask pattern with maximum design fidelity and process window.
“There is effort already on the part of the OPC makers to develop some sort of a model-based assist feature placement, and then try to integrate the assist features with the main pattern correction,” said Moris Kori, Luminescent’s CEO. “In the case of the Inverse Lithography, the way we solve the problem, this is all one and the same. …And there is a need, there is a requirement to do it that way. So either you go there by adding some sort of a model to OPC technologies that exist today that deal with the assist features, or you can take our package, which essentially integrates the whole thing, and in one shot you get the result.”
Listen to the full interview with Moris Kori (Runtime: 12:50)
Read the transcript
The LE — the sale announced today — is the exploratory version of Luminescent’s ILT. The Luminizer Mask Synthesis product, the production version, has been deployed typically at 45 nm production for logic manufacturers, and 50 nm for DRAM. “The design comes in, we process it through the system, and out comes the mask pattern that goes into the mask shop,” Kori said. “So it’s pre-constrained with the existing lithography process flow, and the mask type and so on.”
The LE’s purpose, on the other hand, is designed to explore processes for the next technology generation. “If you’re developing a technology for the next node, and you don’t yet know what scanner you want to use, what kind of illumination source you want to use, what mask type you want to use…it allows you to optimize the design and all of these parameters simultaneously,” Kori explained. “So out of that comes essentially a flow all the way from the design to the final product.”
According to Luminescent, the chipmaker ordered the LE after a full evaluation, finally selecting it for its ability to generate accurate models with extremely sparse anchoring data.
Listen to the full interview with Moris Kori (Runtime: 12:50)
Read the transcript
