Eclipse PVD Tool Handles Thinned Wafers
Working with an Austrian mechatronics firm, the OEM Group has developed an MRC Eclipse PVD tool capable of handling 125 micron thin wafers. The PVD system uses Bernoulli wand technology to handle wafers thinned for through-silicon vias (TSVs) and other backside metal deposition applications.
David Lammers, News Editor -- Semiconductor International, 2/26/2009
The OEM Group (Phoenix) said it will soon ship an MRC Eclipse physical vapor deposition (PVD) tool that can handle the very thin, 125 µm wafers used in 3-D through-silicon via (TSV) applications. The PVD system is equipped with a front end that includes thin wafer-handling capabilities developed by Mechatronic Systemtechnik GmbH (Villach, Austria).
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| The MRC Eclipse Mark IV PVD tool can handle wafers as thin as 125 µm, using Bernoulli wand technology. |
The Austrian company specializes in thin wafer handling, and has developed Bernoulli wand technology that allows wafers to be handled almost contact-free.
Last July, the OEM Group acquired from Applied Materials Inc. (Santa Clara, Calif.) the Legacy line of MRC Eclipse PVD and AGHeatpulse rapid thermal processing (RTP) tools, which Applied had acquired in 2004 as part of its acquisition of Metron Technology Inc. At the 2008 SEMICON West, OEM President Wayne Jeveli said his engineers would move beyond supporting the existing installed base and would begin updating the tools' designs to improve their performance.
This week, Chris Forgey, vice president of product management, said the OEM Group for some time has been able to handle wafers thinned to roughly half the normal thickness. For a 200 mm wafer with a normal thickness of 720 µm, the “classic” Eclipse system could handle wafers with ~300 µm thickness.
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| The OEM Group is now selling PVD systems with internally developed technology. |
“With the trend for equipment to handle thinner wafers for 3-D packaging, we’ve taken a proven Bernoulli wand technology from Mechatronic in Austria and upgraded our system front end to enable us to handle wafers as thin as 125 µm,” he said.
An initial customer has wafer warpage variations up to 5 mm edge-to-edge. “With the Bernoulli wand, we can comfortably accommodate that warpage,” Forgey said, adding that future upgrades are underway to adapt the Eclipse system to other customer needs.
The Eclipse platform still fills the needs of front-side transistor applications, including titanium alloy and aluminum deposition. “What’s interesting are the needs of the emerging markets, MEMS, LEDs, and backside metal deposition for packaging,” Forgey said. “We are seeing a lot of different metals being applied for different applications, including gold and platinum. We believe we have a strong foothold in backside metal deposition to support packaging.”
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