ISMI to Report 450 mm Progress at West
ISMI will present data gathered from 450 mm test wafers to several SEMI task forces at next week’s SEMICON West conference in San Francisco. ISMI Director Scott Kramer said, “This is our fundamental strategy: We are gathering data, doing testing, to influence the standards.” ISMI managers will also present progress on the 300 mm Next Generation Factory initiative.
David Lammers, News Editor -- Semiconductor International, 7/10/2008
At next week’s SEMICON West conference, managers of the International Sematech Manufacturing Initiative (ISMI, Austin, Texas) consortium will detail progress on both the 450 mm wafer transition and the 300 mm Next Generation Factory (NGF) initiative.
| 450 mm test wafers are being tested for wafer handling accuracy at the Interoperability Test Bed (ITB) in Austin, Texas. |
Perhaps the most tangible progress is on the 450 mm front. The ISMI Interoperability Test Bed (ITB) currently has ~100 polysilicon 450 mm test wafers in hand, with silicon crystal wafers expected to arrive later this year.
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| Scott Kramer, Director, ISMI |
ISMI Director Scott Kramer emphasized that ISMI intends to be neutral in the tug-of-war between
companies favoring a “full speed ahead” approach
to the larger wafers and those that
counsel productivity improvements in next-generation 300 mm fabs.
“We are not going to set any timetables. Our intent is to gather data and let the market decide. This is our fundamental strategy: We are gathering data, doing testing, to influence the standards.”
At SEMICON West, representatives from the 16 ISMI member companies will be meeting twice with SEMI task forces, as well as holding a reporting workshop to present the wafer handling test data gathered thus far, Kramer said.
“We are engaging with SEMI at the task force level to report out as much information as we can,” he said, adding that those kinds of meetings will continue at the 2008 ISMI Symposium, planned for Oct. 20-23 in Austin, and at SEMICON Japan, set for Dec. 3-5 near Tokyo.
The ITB staff is gathering data on 450 mm wafer thicknesses and the key robotic and wafer handling aspects, including how the wafers come into a fab from a silicon supplier, how they are loaded into a FOUP, transferred to a load port, and other handling procedures.
At the 2007 ISMI Manufacturing Symposium held in Austin last October, Intel (Santa Clara, Calif.) Material Scientist Mike Goldstein was photographed holding a single polycrystalline 450 mm test wafer. At SEMICON West, ISMI will report on 450 mm test wafers of various thicknesses, “necessary for the testing going on in the lab of the pitch, vibration and sag as we are moving wafers robotically,” Kramer said, adding that some of the test wafers are “on loan to suppliers around the world.”
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| Tom Abell, 450 mm Program Manager, ISMI |
Tom Abell, the ISMI 450 mm program manager, said the test bed is being built out at Sematech’s Austin facility in the same building as the ATDF fab that is now operated by SVTC Technologies LLC (San Jose) as a pilot R&D fab. “We are planning on expanding the lab space with the eventual move into cleanroom space when it makes sense. We have been engaged with multiple suppliers, signed contracts with some and are in negotiations with others. An ITB Users Group of suppliers has been formed this year to work together on the test bed,” Abell said.
Much of the current ISMI work is focused on gathering data on the proposed 450 mm wafer thickness standard of 925 µm. “We are testing whether that is too thin or too thick by working with test wafers with varying physical thicknesses. We want to provide information into the standards process. The 925 µm thickness was a compromise between what the silicon makers sought and what the device makers really wanted. We need to refine the data to more accurately reflect what is possible,” he said.
For the mechanical test wafers, 925 µm is the provisional number in the SEMI balloting process, Abell said, adding that the ITB data is being passed onto the SEMI Physical Interfaces & Carriers (IPIC) standards committee. ITB engineers have also “tested ~10K wafer transfers between a prototype carrier and a prototype robot at 10 mm pitch,” Abell said.
While the 300 mm standards were developed in a conceptual fashion that later resulted in operational gaps, Abell said the 450 mm standards are being developed in a more rigorous data-driven manner.
Abell, an Intel assignee to ISMI, said his team has met with >20 suppliers individually to “listen to their concerns. We heard some very interesting views into the way different suppliers are approaching 450 mm. Many have task forces, with paper studies that range from the very sophisticated to those that are less so. A few suppliers have proposals for 450 mm equipment to present to ISMI.”
Olaf Rothe, program manager of the 300 mm NGF effort, said his team has been “refining the simulation model in terms of cost and cycle time. Rather than just talk about equipment availability, we have been identifying opportunities which are giving drastic opportunities to improve both cycle time and cost. Last year, it was seen as one or the other, but now we can do both.” He estimated that a well-designed 300 mm fab could reduce cycle time by as much as 60%, with a cost improvement of at least 10%, adding that “we believe we can go beyond those numbers.”
NGF’s progress is gated in part by its work with the automated material handling system (AMHS) vendors, which influence “our ability to make decisions on scheduling and dispatching, areas where we need to do more project work.”
Rothe is an Advanced Micro Devices (AMD, Sunnyvale, Calif.) assignee to ISMI, and he was asked to provide information about the AMD-led effort to build a test bed to prove out the NGF productivity enhancements. While AMD has said that it has rented a high-ceiling building in Austin and is making progress on getting the Advanced Development Center (ADC) test bed up and running, Rothe said he could not comment on the NGF plan. AMD Senior Vice President Doug Grose revealed plans for the ADC last October.
ISMI to Report Progress at SEMICON West
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