Lithographers Struggle to Find Answers Below 20 nm
Leading up to a week of SPIE Advanced Lithography in San Jose, a range of industry speakers presented lithography updates Sunday at Nikon's LithoVision symposium. Despite the many advances and refinements achieved, the industry is hard pressed to come up with a viable solution beyond 20 nm.
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 2/23/2009
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At Nikon’s annual LithoVision symposium yesterday on the eve of the SPIE Advanced Lithography conference in San Jose, representatives from throughout the lithography community, as well as Nikon representatives, gave updates on progress being made in immersion lithography, double patterning and extreme ultraviolet (EUV) lithography. Although they had much to tell on the technology advances, a common theme was the consternation at not yet having what appears to be a workable solution beyond 20 nm.
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| Sam Sivakumar, Director of Lithography, Intel |
Outlining his company’s roadmap, Sam Sivakumar, Intel Fellow and director of lithography in Intel’s Portland Technology Development Group in Oregon, expressed considerable concern about the readiness of the EUV infrastructure, particularly the industry’s ability to measure EUV blanks and patterned reticles. Although most chipmakers continue to pin their hopes on EUV taking over where water immersion leaves off, “serious gaps exist on the mask and inspection fronts,” he said.
Sivakumar pointed to the key technical EUV gaps as source readiness, zero-defect reticle process capability, EUV AIMS and 3G blank inspection, blank defect improvement, and the fab reticle QC infrastructure. EUV source development is being commercially funded, and Intel has funded zero-defect reticle capability internally, but the other three factors remain insufficiently funded, he said. Inspection has not been funded, and the full industry enabling cost would be an estimated $150M. Blank defect improvement has been insufficiently funded, but has a cost that is less known — perhaps ~$50M. The cost for a single fab reticle QC tool is estimated at ~$10M. Sivakumar, therefore, noted the increased funding needed to get the remaining infrastructure elements into place in time.
Nigel Farrar, vice president of lithography applications at Cymer Inc., gave an update on Cymer’s EUV source project. The source developer has continued to make progress in several areas, including achieving run times of up to 18 hours at an 80% duty cycle (much more difficult to achieve than the burst powers reported previously), 170 continuous hours of 31 µm tin droplets (harder to achieve as they droplets get smaller), and a debris mitigation system that is working well, Farrar said. Cymer expects to begin shipping pilot systems this year with source powers of >100 W at intermediate focus (IF). Two successive versions of high-volume systems are planned with >200 W IF, and then >400 W IF, with the increased power achieved largely through increased laser power, Farrar said. More details will be given in a presentation Tuesday morning by Cymer’s David Brandt
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| Cymer plans to begin shipping pilot EUV sources this year. |
But despite the advances, none of the major EUV source providers — including Gigaphoton and Philips Xtreme in addition to Cymer — have been able to meet the requirements milestones so far, noted Nikon’s Takaharu Miura. Two of the key issues that Nikon faces in its EUV tool development are the source power and optical transmittance. To the latter point, Nikon is working to achieve a numerical aperture (NA) of >0.30 without having to move from a six-mirror system to an eight-mirror system, which would lower the system throughput.
EUV has many challenges, Intel’s Sivakumar said, and at the logic manufacturer’s 15 nm node, a decision will need to be made about going ahead with EUV or trying to push 193 nm (ArF) optical lithography further. Single-exposure ArF does not have adequate process latitude to yield chips below 40 nm half-pitch, he said, so double patterning — pitch-splitting or spacer technology, depending on the application — will certainly be needed to extend 193 nm immersion beyond that point.
Nikon Fellow Soichi Owa said that double patterning has the potential to get to 20 nm, but the industry faces a lot of question marks about the viability of the remaining candidates at that point. Although there had been hope that high-index immersion lithography – using lens materials, immersion fluids and resists with higher refractive indexes – could carry ArF lithography further, high index has largely gone the way of 157 nm lithography.
Owa noted that high-index immersion’s position is falling behind the International Technology Roadmap for Semiconductors (ITRS), and reminded the audience that Nikon discontinued its high-index program in May last year, and Sematech and others stopped collaborating on high-index lens (LuAG) development in September.
With the gaps that exist in the current solutions, Sivakumar said, the industry may have to begin looking more seriously at alternative solutions, including, perhaps, spacer-based pitch quadrupling.
Source-Mask Optimization Continues on Track
02/09/2010
