IDMs, Fabless Face Reliability Challenges
Managers from Broadcom, Intel and Xilinx are among the invited speakers at the upcoming International Reliability Physics Symposium. The varying approaches to reliability by the large IDMs and the major fabless vendors that rely on foundries is a theme at this year's IRPS, scheduled for April 26-30 in Montreal.
David Lammers, News Editor -- Semiconductor International, 4/15/2009
|
The International Reliability Physics Symposium (IRPS), scheduled for April 26-30 in Montreal, will take up the different approaches taken by fabless IC vendors and IDMs to the reliability challenges presented by deep-submicron ICs.
Reliability managers from two large fabless companies — Broadcom Corp. (Irvine, Calif.) and Xilinx Inc. (San Jose) — will describe their approaches to working with foundries. And Chris Conner, a quality and reliability manager at Intel Corp.’s logic technology group in Hillsboro, Ore., will detail Intel’s efforts to determine the hardiness of the high-k metal gate stack and lead-free solder materials, both first introduced at the 45 nm node.
Conner said Intel’s multiple technology advances at the 45 nm node, ranging from the replacement-gate process to the tin-silver-copper (SAC) solder used in the packaging steps, required “a tremendous amount of collaborative work with the process and packaging teams, which we believe is easier to do at a place like Intel than in a foundry-type model.”
Conner said Intel used confocal scanning acoustic microscopy (CSAM) to inspect >32,000 production-level 45 nm parts to ensure that soldering was done without cracks or delamination. In his IRPS presentation, Conner also will describe how Intel gained insights by comparing burn-in defect and process yield defect density levels. “Solving the challenges required tight-knit collaboration,” he said. “It would be much harder to get it all to work if we had to go out to a foundry, though some would say it would be doable.”
|
| S.Y. Pai, Xilinx Inc. |
One of those would be S.Y. Pai, senior director of reliability at Xilinx, who gets a front-row seat during the process development efforts at Xilinx’s foundry partners. Field programmable gate arrays (FPGAs) have two attributes that foundries love, Pai said. FPGAs require leading-edge processes to boost gate densities and performance, and they can be configured as test vehicles to provide defect-density feedback.
The reliability challenges facing Xilinx are becoming more complex as strained silicon, and high-k and low-k dielectrics are deployed, Pai said. For example, Xilinx is working with automotive companies, which have severe cold weather requirements. Cold weather tends to reveal latent defects such as a partially filled tungsten via or a particle that has partially blocked an implant step.
“FPGAs are the ideal vehicle to improve defect densities and reliability,” Pai said, a challenge that keeps getting bigger as Moore’s Law continues. To cope, the industry needs to use stricter design rules and evolve the design-for-manufacturing (DFM) tools. “Now, we use low-level DFM rules, but we need to move to more advanced technology, to a higher level. DFM needs to be enhanced further.”
|
| Cold weather (-40°C) reliability requires going beyond simple guard banding to more advanced screening techniques. (Source: Xilinx Inc.) |
Pai advocates stricter layout restrictions to avoid problem-prone geometries. For example, at the 130 nm generation, Xilinx found problems that traced back to a “very specific transistor with a unique width.” As a result, the foundry “outlawed” a shallow trench isolation trench with that width. Also, Pai said, foundries and their fabless partners need to go beyond defect-density reduction, focusing more on distribution analysis techniques to deal with outliers in a screening process.
Asked if foundries and fabless companies have communication issues that slow down yield debugging and reliability efforts, Pai said Xilinx has developed “a seamless interface” with its major foundries. “We have skills which complement each other. And we work with them early, very early,” Pai said. “For the 28 nm process being developed at one partner, we have been working with them for quite a while now.”
There is more than one way to tackle technology development, Pai said, quoting the thinking of Massachusetts Institute of Technology (MIT) Professor Charles Fine, author of the book Clockspeed. Fine used the double helix structure discovered by Watson and Crick as a metaphor to describe what he said were “infinite waves between vertically integrated industries occupied by corporate behemoths and horizontally integrated industries occupied by myriad innovators, each seeking a niche.”
Pai said he applies Fine’s double helix approach to the semiconductor industry, divided among the IDMs and fabless companies such as Xilinx, which has ~$2B in annual revenues. “This industry is in perpetual loops of integration and disaggregation,” Pai said, with both having their merits. “It doesn’t mean that the other guy’s way of doing things doesn’t work.”
Robert Lutze, vice president of quality assurance and reliability at Broadcom, also will present his views on working with multiple foundries. “There may be a wide spectrum among fabless companies in managing product quality and reliability,” Lutze said, “each with their own quality and reliability management methodologies and specifications.”
Transcript: Phase-Change Memories by 2010
02/09/2010
