Webcast: Wafer Cleaning Challenges
By Semiconductor International Staff -- Semiconductor International, 8/3/2005
AVAILABLE ON-DEMAND
As the industry develops processes for the 65 and 45 nm nodes, wafer cleaning and photoresist removal faces new challenges for both FEOL and BEOL process requirements, with far more stringent requirements on surface cleanliness, material loss and etching precision. The introduction and integration of new dielectric materials creates additional requirements for surface engineering and control.
Tune into this webcast and hear Editor-in-Chief Peter Singer and a paneI of leading industry experts share their views on key wafer cleaning challenges, including megasonic damage and trench cleaning, and potential solutions. Register today--it's free!
Moderator
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Peter Singer Editor-in-Chief Semiconductor International |
Panelists
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Renee Mo FEOL Logic Process Development Semiconductor R&D Center, IBM Systems and Technology Group |
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Paul Mertens
Program Leader Ultraclean Processing Program IMEC |
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Ahmed Busnaina Director, Center for Microcontamination Control Northeastern University |
Webcast Sponsors
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