Transcript: ITRS Lithography Update Weeds Out 45 nm Options
Aaron Hand, Executive Editor, Electronic Media -- Semiconductor International, 12/21/2007
Listen to the interview (Runtime: 11:11)
Hand: Hi, this is Aaron Hand, executive editor of electronic media for Semiconductor International. I’m here today with Mike Lercel, who’s lithography director at Sematech. He’s also the U.S. chair of the lithography ITRS working group. Hi, Mike.
Lercel: Hi, Aaron.
Hand: You gave a presentation recently at SEMICON Japan, giving an update to the lithography chapter of the ITRS.
Lercel: Yeah, that’s correct. Typically, after we have most of our major working group meetings, we go and give an update to the public, explaining some of the changes that are going to be taking place. It kind of gives people a little bit more of an outlook of what’s going to come in the actual document, which should be out just in a few weeks.
Hand: Okay. So, I’ve taken a look at the presentation that you gave, and just want to get some highlights from you; get a little more perspective on what’s changed in the 2007 update. I notice the potential solutions now for 45 nm lists only 193 nm immersion with water and 193 nm immersion with double patterning. How does this differ from the previous version?
Lercel: Oh, that’s a good question, Aaron. And this is probably one of the more notable changes in the document, in that, at 45 nm half-pitch, people are starting to implement solutions today. And they’re only implementing the ones where the complete infrastructure is in place and they have technology solutions, and they can really… The aggressive companies are really starting to integrate devices.
The only things that are available are pretty much 193 nm immersion and double patterning options. And therefore, the other options that were on in prior years just really aren’t ready in time. And it’s really been narrowed down to what you can buy today, and that’s those two.
Hand: Okay. And what were the other options that were on there previously?
Lercel: Well, previously, depending on how far back you go, there was EUV was a possibility for 45 half-pitch, high-index immersion because that can replace some of the double patterning, and if you go farther back, I think even maskless and imprint were considered options for 45 half-pitch.
Just from a timing perspective, the flash companies, the advanced logic companies are, as I said, really aggressive in terms of starting to introduce 45 nm half-pitch process development today.
Hand: Okay. There’s a couple points I want to get back to there. But one of them is: All of those technologies are still considered for 32 nm, correct?
Lercel: Yes, that’s correct.
Hand: Okay. So what is the roadmap view at this point for 32 nm development. What do you see as the prime candidates?
Lercel: Well, so it’s never an official order, but when we put things in the box for each of these technologies, typically, the one that is the most likely is on top. And so if you look at 32 half-pitch, what you’ll also see is the order has changed from the 2006 to the 2007 tables in that the double patterning option – the 193 immersion double patterning – is now the top option, because people are saying, again, that’s what we have that we see can be available for 32 half-pitch development, so that’s probably the most likely. EUV is the second option because many people still consider that certainly the best option because it avoids the double patterning. And then the high-index fluid is the next option.
Hand: Okay. Now, one of the other things you just mentioned is the push from flash and advanced logic. The roadmap is typically driven by DRAM half-pitch, correct?
Lercel: That’s the number that drives a lot of the table entries at the highest level, but in all reality, if you actually look in detail at some of the numbers in the charts, some of them are driven by the MPU logic, some are actually driven by flash, and some are driven by DRAM, mostly based on product requirements. And we have that discussion usually internally within the working group.
Hand: So, are the flash devices having pretty much influence on the roadmap these days with their accelerated half-pitch?
Lercel: Definitely. And as you pointed out, Aaron, although we label each of the years by the DRAM half-pitch, and that’s kind of the traditional number, in the tables there’s also a flash half-pitch, which, if you look closely, is accelerated by quite a bit compared to the DRAM half-pitch. And that number drives some of the table entries. But as I just mentioned, some of the other entries are driven by either DRAM or MPU, depending on device requirements.
Hand: Okay. Now, I notice that double patterning/double exposure is having a fairly big impact. I believe it made somewhat of a debut more in 2006. What kind of new issues is that bringing up on the roadmap?
Lercel: Well, I think basically, we realized the complexity of the double patterning. In 2006, it was starting to emerge as an option, so we tried to address it in the roadmap with some fairly generic requirements for double patterning. But then if you look very carefully at the different options that are available, there’s multiple ways of doing double patterning, there are different requirements for different types of features. We tried to add some of that complexity to both the text and the table entries in this year. We’re really hoping to provide some guidance for the industry in how do you call out these different entries, and what are some of the different requirements based on device features that we didn’t really address in 2006.
Hand: Okay. So, what are some of the bigger issues related to double patterning?
Lercel: Well, I guess first to talk maybe about the types of patterns in that, if you use double patterning where … each feature is independent of the other exposure, that’s kind of this generic case that seems fairly reasonable to do. It drives a little bit tighter litho requirements, but it’s the one that most people are going to make, in practice. But what we also tried to call out is that there’s another type of feature where you do a double patterning where two exposures define one critical feature. So suddenly things like overlay become part of your CD budget. Just to make it clear to everybody, we put parameters in place for that dependent exposure case, and that’s the one that really people can’t do today. And so if you start to make design rules for a dependent exposure, what you’ll find out is that probably that’s something that we really can’t necessarily practice today.
Hand: You mentioned in your presentation that you gave in Japan concerns about CD uniformity. Is that related to overlay, or is that in general, with variability concerns?
Lercel: The comments I made were mostly in conjunction with variability concerns that are independent of the double exposure case, because a lot of the CD uniformity – the tightest number is the gate CD uniformity for MPU, and that’s probably not the first thing that’s going to be double patterned. Again, some people may disagree with me on that. But that gate CDU number is driven entirely by device variability, and that’s a huge challenge in itself, and that’s one where we continue to look ahead and see that that’s a big challenge for the industry to come up with solutions to address that.
Hand: It looks like another big challenge, which I don’t see any solutions on the horizon, are on line edge roughness, line width roughness control?
Lercel: Yes, Aaron, that’s clearly another one that’s really come up. It’s traditionally been a serious challenge because it’s the device requirements that always drive this line width roughness number. And what we have in fact identified – and we didn’t really completely include in the ITRS in 2007, but we’ll be working on next year – is the fact that, when you have your gates become even smaller, the line width roughness, which has a characteristic length scale of a few hundred nanometers, now starts to become a component of your CD uniformity in itself. So not just purely the width variation number, but it actually becomes a statistical component of the CD uniformity. That may drive the line width roughness even tighter that’s in the roadmap today, and the numbers in the roadmap today are already hard to hit, if not… There will be no known solutions in the near future.
Which is I think a great opportunity for research organizations to really look to see how they can really make a big improvement to the line width roughness numbers in patterning in the future.
Hand: Do you think that will be handled mainly through new resist compositions?
Lercel: I think that’s the best way to address it because it’s the way that’s the most straightforward compared to how we practice lithography today. But I think there may be opportunities to look for more creative solutions as well.
Hand: Okay. Anything else that sticks out that you’d like to highlight for this new update?
Lercel: Well, I think another big one that’s really come up is this question of the overlay. And that was a big question last year and the year before as we significantly tightened the overlay to address the DRAM concerns. And we’ve definitely seen a lot of progress. I think people have really looked at the roadmap and seen that that’s an area where they need to make improvements. The overlay number’s also driven strongly by some of the double exposure requirements, and I think maybe that’s a success, that we can look at, there really is some improvements being made in the overlay capability that didn’t really exist two years ago, when we had more relaxed numbers in the roadmap. That being said, there’s still a lot of improvement in overlay that’s needed in the near future.
Hand: Okay. Can you give me an idea of timing? It’s going to be a few weeks before you come out with the new lithography chapter. Is that correct?
Lercel: That’s correct. I don’t actually have the specific date myself, but it’s supposed to be out sometime in January.
Hand: Well, we’ll certainly follow up then, and give people more information as that comes out. But I thank you very much for talking with me today for some of these highlights.
Lercel: Well, thank you very much, Aaron. I appreciate the opportunity. And happy holidays to you and all the listeners.
Hand: And to you also. Thanks.
