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RSS   Yield Management

The latest news and information on semiconductor yield management, including process control, reliability, defect detection and design for manufacturing.

  • How to Detect Non-Overlay Misalignment Errors?
    Laura Peters, Editor-in-Chief - 05/08/2008
    Engineers at SMIC were confronted with an unusual problem in their DRAM fab — how to detect a misalignment error that was not caused by an overlay problem. They worked with Applied Materials to detect this defect using a darkfield inspection tool, which was verified by SEM defect review and FIB cross-section. More

  • A Better Way to Manage Test Wafers
    Laura Peters, Editor-in-Chief - 05/08/2008
    Advanced Micro Devices is in the process of applying lean concepts throughout its organization — even to highly manual operations, such as the use of test wafers in 300 mm fabs. More
  • Applied Tackles Edge With Inflexion Polishing System
    David Lammers, News Editor, and Laura Peters, Editor-in-Chief - 05/07/2008
    Applied Materials introduced the Inflexion edge polishing system that has an integrated wafer cleaning capability. The Inflexion tool uses abrasive tape to clean the wafer’s edge, an area that faces new contamination issues as immersion lithography pushes liquids to the edge of the wafer. More
  • Real Men/Women Do Have Fabs
    Laura Peters, Editor-in-Chief - 04/30/2008
    Tom Sonderman, vice president of manufacturing technology at Advanced Micro Devices (AMD, Sunnyvale, Calif.), declared at yesterday’s SEMI Strategic Business Conference (Napa Valley, Calif.) that “real men and women do have fabs.” More
  • TSMC Sketches 32 nm Rollout Plan for 2009
    David Lammers, News Editor - 04/28/2008
    Taiwan Semiconductor Manufacturing Co. Ltd. plans to begin 32 nm production in the third quarter of 2009, with foundry production of dual core 3G cell phone chipsets as one focus, said Jack Sun, TSMC’s vice president of R&D. TSMC will use a high-k/metal gate process for high-frequency microprocessor production, he said, while sticking with a poly/oxynitrides gate stack for the general purpose and low-power platforms. More
  • Intel Tackles EUV Mask Cleans
    Aaron Hand, Executive Editor, Electronic Media - 04/02/2008
    At Sematech’s Surface Preparation and Cleaning Conference in Austin, Texas, Intel’s Ted Liang detailed the results of a study designed to find solutions for adding zero particle contamination to EUV masks through the cleaning processes. More
  • LED Design, Optimization Using TCAD Modeling
    Ricardo Borges, Wei-Choon Ng and Gergö Letay, Synopsys Inc., Mountain View, Calif. - 04/01/2008
    TCAD modeling is widely used in semiconductor manufacturing simulation and analysis routines, from wafer track schedulers to yield management systems. The optoelectronics industry is now applying TCAD to its manufacturing processes, enabling control of process variations and improved yields. More
  • Semiconductor International Announces New Editor-in-Chief
    Staff - 03/26/2008
    Laura Peters has been promoted to the position of editor-in-chief of Semiconductor International magazine, succeeding Peter Singer. More
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  • Blogs
  • Talkback
  • Podcasts

Alexander E. Braun
The Measure of All Things

May 9, 2008
Revisiting a Conference and Some Ongoing Problems
During a conversation on some of the lithography and metrology technology problems th...
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Alexander E. Braun
The Measure of All Things

April 15, 2008
Aerial Imaging Simplifies Mask Inspection
Mask inspection certainly has not been made any easier by the continuing complexity b...
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Laura Peters
SI's Take on Semicon West

July 18, 2007
Just Clean Enough – New Yield Mantra
After years of driving specifications for particles and other contamination to smalle...
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Dan Herr, SRC
Meeting Nanotech's Metrology Challenges

Dan Herr is director of Nanomanufacturing Science Research at SRC. An important part of his research focuses on nanotechnology’s demands on metrology, and he discusses his work to determine where metrology technology’s gaps are, and how to fill them.

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Technical Articles

    LED Design, Optimization Using TCAD Modeling
Ricardo Borges, Wei-Choon Ng and Gergö Letay, Synopsys Inc., Mountain View, Calif., 04/01/2008
TCAD modeling is widely used in semiconductor manufacturing simulation and analysis routines, from wafer track schedulers to yield management systems. The optoelectronics industry is now applying TCAD to its manufacturing processes, enabling control of process variations and improved yields....

    Fab-Wide SPR Speeds Yield Improvement
Andrew Drozda-Freeman, Mike McIntyre, Mike Retersdorf and Chris Wooten, Advanced Micro Devices, Sunnyvale, Calif.; Prasad Bachiraju, Xin Song andLen LaBua, Rudolph Technologies Inc., Flanders, N.J., 03/01/2008
Spatial pattern recognition (SPR) technology can speed the correction of yield-robbing problems. The challenge is to deploy a system capable of processing the enormous amount of data generated in modern fabs, and then organize it for fast and consistent problem solving....

    Dynamic Analysis Offers a Better MSA Management Alternative
Phillip H. Williams, Freescale Semiconductor Inc., Chandler, Ariz., 02/01/2008
Just like process tools, a measurement system that can demonstrate statistically stable output should not have to undergo routine characterization. Instead, a dynamic MSA can be achieved with at-hand SPC data....

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EVENTS

Semiconductor Reliability Course
May 19-21, 2008
Munich, Germany
Failure and Yield Analysis Course
May 26-29, 2008
Munich, Germany
International Conference on IC Design & Technology
June 2-4, 2008
Grenoble, France

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