The latest news and information on semiconductor packaging, including wafer-level packaging, chip-scale packaging, 3-D integration, lead-free solder/RoHS, stacked die/packages, wafer bumping, die bonding, wire bonding, and encapsulation.
Mitsubishi, Renesas Develop Solder Tool for Fine-Pitch BGAs Kenji Tsuda, Asia Contributing Editor - 05/14/2008
Engineers from Mitsubishi Electric and Renesas Technology have developed a solder ball machine tool that can deposit 13-µm-diameter balls using a lead-free solder alloy of silver and tin. While the tool has a throughput that makes it suitable for prototyping thus far, it may enable smaller-pitch BGA packaging. More
Freescale Taking Redistributed Chip Packaging to Pilot Production Stage David Lammers, News Editor - 05/12/2008
Freescale Semiconductor Inc. has moved its RCP packaging technology to pilot production, starting with a Freescale chip designed for a customer making MP3 players. The unique approach uses lithography and etching techniques to define I/Os that can be smaller and less expensive than conventional BGA packaging, said RCP operations manager Navjot Chhabra.
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Overcoming Performance Bottlenecks With Embedded Active Chips Jitesh Shah and Tu Vu, Integrated Device Technology, San Jose - 05/01/2008 Embedding a chip in the core of the substrate helps overcome performance bottlenecks by bringing terminals on the chip almost to the circuit board level — improving signal quality and power supply noise performance thanks to a relatively short interconnect distance from chip to circuit board.More
3-D Interconnections On the Rise Joe Fjelstad, Founder, SiliconPipe, San Jose, www.siliconpipe.com - 05/01/2008 The chip has been unchallenged as the ultimate form of electronic circuit integration since the invention of the IC. The rate of increased integration has steadily marched ahead since that time, keeping pace with the predictions of Moore's Law. Current projections are that Moore's prediction will hold for another several years, but it is also generally agreed that the laws of physics will...More
Package-on-Package Variations On the Horizon Flynn Carson, STATS ChipPAC Inc., Fremont, Calif. - 05/01/2008
Improvements to both the surface-mount process and PoP assembly process and materials set are becoming necessary as the industry embarks on high-volume production of next-generation PoP devices.
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Oki Integrates AlGaAs LEDs on Silicon Mounting Chips Kenji Tsuda, Asia Contributing Editor - 04/24/2008
Oki Digital Imaging Corp. is in mass production with LED print heads that use a film bonding technique to integrate AlGaAs epitaxial layers on CMOS silicon ICs. The approach avoids wasting valuable space on bonding pads, resulting in higher-density arrays for LED print heads, Oki managers said at the INC4 conference in Tokyo.
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STMicro Kicks Off Greater China HQ R&D Center Yao Gang, Editor-in-Chief, SI China - 04/17/2008
STMicroelectronics kicked off a $25M R&D center at its Greater China headquarters in Shanghai. The company garners ~30% of its revenues from the Greater China region, which includes the Chinese mainland, Hong Kong and Taiwan.
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Gartner Downgrades 2008 Capex Spending Forecast David Lammers, News Editor - 04/16/2008
Gartner Inc. predicted a 19.8% contraction for 2008 semiconductor capital investments, with the U.S. recession and sharp cutbacks by DRAM vendors causing the reduced spending. Bright spots include an apparent rebound by semiconductor assemblers, driven by continued growth in PC and cell phone IC shipments.
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Dan Herr is director of Nanomanufacturing Science Research at SRC. An important part of his research focuses on nanotechnology’s demands on metrology, and he discusses his work to determine where metrology technology’s gaps are, and how to fill them.
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Technical Articles
Overcoming Performance Bottlenecks With Embedded Active Chips Jitesh Shah and Tu Vu, Integrated Device Technology, San Jose, 05/01/2008 Embedding a chip in the core of the substrate helps overcome performance bottlenecks by bringing terminals on the chip almost to the circuit board level — improving signal quality and power supply noise performance thanks to a relatively short interconnect distance from chip to circuit board....
3-D Interconnections On the Rise Joe Fjelstad, Founder, SiliconPipe, San Jose, www.siliconpipe.com, 05/01/2008 The chip has been unchallenged as the ultimate form of electronic circuit integration since the invention of the IC. The rate of increased integration has steadily marched ahead since that time, keeping pace with the predictions of Moore's Law. Current projections are that Moore's prediction will hold for another several years, but it is also generally agreed that the laws of physics will......
Package-on-Package Variations On the Horizon Flynn Carson, STATS ChipPAC Inc., Fremont, Calif., 05/01/2008
Improvements to both the surface-mount process and PoP assembly process and materials set are becoming necessary as the industry embarks on high-volume production of next-generation PoP devices....
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Overcoming Performance Bottlenecks With Embedded Active Chips
