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Cost a Major Challenge for Advanced Packaging Solutions
Over the past several years, IDMs have seen the price of silicon fabrication fall, while the cost of packaging, assembly and test has steadily been on the rise. More
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Wafer-Level Packaging in Africa?
Yes, Africa. Nemotek Technologie is manufacturing wafer-level optics and packaging in its state-of-the-art facility located in Morocco's Rabat Technopolis Park.
Sematech Seeks EUV Mask Tool Funding
Few commercial suppliers are stepping up to develop the EUV mask inspection tools that will be needed for 22 nm EUV patterning, said Bryan Rice, director of lithography at Sematech. The consortium is organizing a meeting at SEMICON West of government, consortia and private industry leaders to develop financial support for the EUV mask infrastructure.
Sematech Crafts ZIL Solution for 16 nm
Sematech researchers said a zero interface layer (ZIL) approach has been demonstrated, and may be brought into chip manufacturing within the next few years. By eliminating the oxide interface layer between the high-k dielectric and the silicon channel, the EOT can be sharply improved, reducing short channel effects while improving the drive current.
Most Viewed Stories for Week of June 22, 2009
This week's top stories included two 3-D-related pieces: a story on the SUSS MicroTec wafer bonding partnership with 3M, and a blog on promising start-ups that presented at ECTC. Growth possibilities in the MEMS markets, Dainippon Screen's deal with Applied to make track vendor Sokudo a DNS subsidiary, and a look at how printed electronics technologies will impact display round out this week's most-viewed stories.
News from the Web
Seamless Power Switcher And Battery Charger Solution Targets Portable Devices
Source: electronicdesign.com
Date: 5 hours 43 minutes 26 seconds ago.Altera Collaborates With National Semiconductor to Facilitate Routing High-Resolution Digital Video in Automotive Applications
Source: www.altera.com
Date: 10 hours 59 minutes 39 seconds ago.Parallel Execution of Visual Studio Team System Unit Tests
Source: www.chiplist.com
Date: 07-03-2009 00:07:52 GMTDDR3 to Capture 30% of the Market by Year End - DRAMeXchange
Source: www.xbitlabs.com
Date: 07-02-2009 19:43:20 GMT
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News From Lexis Nexis
Perspectives From the Leading Edge
July 02, 2009
ESI acquires XSil IP and Assets
Other information sources / blogs may be satisfied giving you headlines and...
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The Measure of All Things
June 30, 2009
Scatterometry on Steroids
It‘s always pleasant to report on ways that our industry often manages to...
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Chipworks Inside Angle
June 11, 2009
Sandisk Uses Nine-Chip Stack in Latest microSD Card
Our Inside Angle is supposed to feature some of the remarkable things that we see...
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Views on News
May 18, 2009
Peering into Nanocrystal NAND
Freescale Semiconductor’s assertion that nanocrystal (NC) NOR flash will go...
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What defect densities (or number of defects causing faults) do you expect on a...
Melvin Breuer– 7/3/2009 4:54:08 PM CDT
in response to Wafer-Level Packages Set Sights on Large DieThe memory makers are already using double patterning below 40 nm half-pitch....
memory maker– 7/1/2009 4:48:28 AM CDT
in response to Sematech Seeks EUV Mask Tool FundingContinued EUV support is very poorly justified. To be frank, from what I have...
not liking what I see– 7/1/2009 1:39:49 AM CDT
in response to Sematech Seeks EUV Mask Tool FundingExcellent choice of topic. Interesting summary of CD metrology status, showing...
Yigal Dafna– 6/30/2009 2:55:45 AM CDT
in response to How CD-SEMs Complement Scatterometry
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Photovoltaics on Track for Long-Term Role
Craig Hunter is vice president and general manager of the solar business at Intermolecular (San Jose), which specializes in combinatorial R&D. He previously worked at Applied Materials, where he led the company's entry into the thin-film solar business. In this interview, Hunter discusses the economic and technical future of PV.
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Unique Nanotech College Opens New Horizons
Alain Kaloyeros, senior vice president and CEO for the University at Albany's College of Nanoscale Science and Engineering (CNSE), discusses his plans and hopes for the most advanced educational establishment of its kind, which houses the only fully integrated 300 mm wafer computer chip pilot prototyping and demonstration line.
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Now Playing: TSMC Video - SIA Forecast Webcast
TSMC video from November 19, 2008 Semiconductor International webcast - SIA...
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Events
BrightSpots 3D IC Forum
Dates: 07-24, 2009Location:2009 International Workshop on EUV Lithography
Dates: 07-17, 2009Location: Sheraton Waikiki, HonoluluTopical Workshop on Wire Bonding
Dates: 07-13, 2009Location: San Francisco, Calif.
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